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国内知名IC设计公司急聘SOC Verification Engineer!!!工作地点:上海 [复制链接]

本帖最后由 wswjm777 于 2015-7-9 15:55 编辑

Dear All,

国内知名IC设计公司急聘SOC Verification Engineer!!!工作地点:上海,欢迎投递简历至:Jessicawu2308@hotmail.com或加qq:931297119进行咨询

薪资20-35w,具体可谈,JD如下:


JOB RESPONSIBILITIES

-        Apply specialist skills and knowledge in both hardware and software to perform Pre-Silicon verification tasks for complex Media Processor SOC devices

-        Perform co-verification of processor models and RTL including application software and firmware verification.

-        Support the development of multi abstraction/views to enable a thorough SoC verification from unit level to system level

-        Participation in the continued development of verification strategies; evaluate and integrate cutting edge verification/emulation methodologies into the tool flow

-        Work with other cross functional teams to specify, verify and improve SoC quality and timeliness to production



EDUCATION REQUIREMENTS

Bachelor degree in Electrical Engineering or related area, MSEE is preferred



YEARS OF EXPERIENCE REQUIREMENT

3 years or above experience in ASIC/complex SoC verification.



KEY KNOWLEDGE, SKILLS AND ABBILITIES REQUIRED

-        Experience of SOC designs with embedded processor cores and their integration with other system components including memory subsystems and peripherals

-        Familiar with Microprocessor and/or DSP instruction sets and how low level driver software integrates into SOC architecture. Solid debugging ability on ARM processors is preferred

-        Familiar with HDL languages, simulation tools and testbench design, low level assembler languages and C, or C++, scripting languages (Python/Makefile/Perl)

-        Good English and communication skills

-        Experience related to stream processing, video/audio decoding, process technology and reliability qualification is a plus

-        Experience with a high-level verification language such as System Verilog or Specman is preferred

-        Hands-on experience with UVM is a plus

-        Experience related to Low Power Verification with UPF/CPF flow is a plus

-        Experience with gate level simulation is preferred

-        Some RTL design/modeling experience is a plus

-        Hands-on verification experience with Emulator/FPGA platform is a plus




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