2015年，上海，林恩咨询举办高级ESD防护设计课程

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2015年，上海，林恩咨询举办高级ESD防护设计课程 [复制链接]

这次ESD防护设计课程主要讲授在先进工艺平台, 高速电路, 无线界面, 特别耐高压等设计方面, 以及在特殊环境应用领域的汽车电子, 工业产品方面的ESD问题探讨和设计。通过这次课程, 让学员更清楚得了解在高密度, 小型化, 复杂功能电子设备设计的背景下, 如何实现减少ESD 设计面积, 设计时间, 提高IC性能和完成苛刻的ESD/ LATCH-UP, EOS等各项指标的要求。随着IC先进制程技术的应用, 芯片功能的增多和尺寸的减小, 对于半导体厂和设计公司来说, 不断面临着产品对静电保护ESD提出的越来越高的要求。

本次课程提供ESD设计方面的革新，使设计公司能够把ESD融入IC设计中，让产品在生产、装配、运输过程中能够有更好的良率。同时也可以提供-0N-CHIP TVS解决方案来针对系统层级的ESD STRESS。

这次授课老师为Bart Keppens，ESD/EOS领域的专业权威人士，丰富的工业界ESD防护设计经历，2002年之前就职于IMEC（比利时微电子研究中心），现任Sofics 公司Director Technical Marketing。SOFICS, 作为欧洲ESD和EOS 领域的资深企业, 早已成为TSMC IP中心, 设计中心的联盟成员, 也是UMC的合作伙伴。ESD IP覆盖一直到了28nm的先进工艺制程，与此同时, 在新的工艺平台SOI, 3D-IC, FINFETs方面, 公司也提出了创新的ESD解决方案。

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Lecturer’s Biography:

Bart Keppens received an Engineer degree in Electronics in Leuven in 1996. His master thesis, together with his colleague Steven Servaes, ‘Transmission Line Pulsing (TLP) techniquefor analyzing ESD reliability’, performed at IMEC, Leuven, Belgium, receivedthe BARCO-award for best Industrial Engineer thesis in 1996. In 1996 Bartjoined IMEC and was responsible for device electrical characterization, supportfor the ESD group and for the Non Volatile Memories group for layout andtesting.
From May 2002 he joined SarnoffEurope, Belgium, solving ESD related problems for customers worldwide, first asESD engineer, later as technical leader, ESD design specialist. From 2006, Bartsupports the Business Development initiatives as Technical Director for ESD.After a management buy-out in June 2009, Sarnoff Europe became 'SOFICS -Solutions for ICs' where Bart is Director Technical Marketing working withsemiconductor companies worldwide.
Bart (co-) authored more than 25 peer-reviewed published articles in the field of ‘on-chip ESD protection and testing’ and ‘Non Volatile Memories’.
Invited papers on ESD solutions and TLP analysis techniques have been delivered at the RCJ ESD symposium in Japan every year between 2006 - 2012. He is member of the Technical Program Committee (‘TPC’) of the EOS/ESD symposium since 2003, member of the ESREF TPC in 2003, 2005, 2007, 2009 and 2010 and member of the Taiwan ESD and Reliability conference TPC since 2010. Bart acted as a Workshop Panelist on ESD topics during various conferences (EOS/ESD Symposium and RCJ) and presented invited tutorials at Taiwan ESD and Reliability conference in 2008, 2010 and 2012. Bart holds several on-chip ESD protection design patents.