/*
* ADS126x.h
*
* www.eeworld.com
*
* littleshrimp
*
* 2016-8-2
*/
#ifndef
ADS126X_H_
#define ADS126X_H_
// C Standard Libraries
#include <assert.h>
#include <stdint.h>
// SELECT A DEVICE
//#define ADS1262 //Standard definitions for both
ADS1262 and ADS1263 devices
#define ADS1263 //Additional definitions to support
ADS1263 additional features
//BEGIN ADC DEFINITIONS
#ifdef
ADS1262
#define ADS126x_NUM_REG
(0x15)
/* ADS1262 has
21 registers */
#endif
#ifdef
ADS1263
#define ADS126x_NUM_REG
(0x1B)
/* ADS1263 has
27 registers */
#endif
/* SPI Commands */
#define NOP
(0x00)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define RESET
(0x06)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define START1
(0x08)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define STOP1 (0x0B)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define RDATA1
(0x12)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define SYOCAL1
(0x16)
/* ID/CFG REGISTER
(ADDRESS 00h) */
#define SYGCAL1
(0x17)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define SFOCAL1
(0x19)
/* ID/CFG
REGISTER (ADDRESS 00h) */
//Multi-Byte Commands
#define RREG
(0x20)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define WREG
(0x40)
/* ID/CFG
REGISTER (ADDRESS 00h) */
/* Additional ADS1263
Commands */
#ifdef
ADS1263
#define START2
(0x0C)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define STOP2
(0x0E)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define RDATA2
(0x14)
/* ID/CFG REGISTER (ADDRESS 00h) */
#define SYOCAL2
(0x1B)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define SYGCAL2
(0x1C)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define SFOCAL2
(0x1E)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#endif
/* STATUS Byte Masks */
#define ADC2_NEW
(0x80)
/* Indicates new
ADC2 data */
#define ADC1_NEW
(0x40)
/* Indicates new
ADC1 data */
#define EXTCLK
(0x20)
/* Indicates ADC
clock source */
#define REF_ALM
(0x10)
/* Low Reference
Alarm - Only used with ADC1
*/
#define PGAL_ALM
(0x08)
/* PGA Output
Low Alarm - Only used with ADC1
*/
#define PGAH_ALM
(0x04)
/* PGA Output
High Alarm - Only used with ADC1 */
#define PGAD_ALM
(0x02)
/* PGA Diff
Output Alarm - Only used with ADC1 */
#define RST_ALM
(0x01)
/* Indicates
device reset (re-named to avoid conflict) */
/* Register Addresses */
#define ID
(0x00)
/* ID/CFG
REGISTER (ADDRESS 00h) */
#define POWER
(0x01)
/* Power
Register*/
#define INTERFACE
(0x02)
/* Interface
Register*/
#define MODE0
(0x03)
/* Mode0
Register */
#define MODE1
(0x04)
/* Mode1
Register */
#define MODE2
(0x05)
/* Mode2 Register
*/
#define INPMUX
(0x06)
/* Input
Multiplexer Register */
#define OFCAL0
(0x07)
/* Offset
Calibration, High Byte (Address 07h) */
#define OFCAL1
(0x08)
/* Offset
Calibration Registers*/
#define OFCAL2
(0x09)
/* Offset
Calibration Registers*/
#define FSCAL0
(0x0A)
/* Full-Scale
Calibration, High Byte (Address 0Ah) */
#define FSCAL1
(0x0B)
/* Full-Scale
Calibration Registers*/
#define FSCAL2
(0x0C)
/* Full-Scale
Calibration Registers*/
#define IDACMUX
(0x0D)
/* IDAC
Multiplexer Register*/
#define IDACMAG
(0x0E)
/* IDAC
Magnitude*/
#define REFMUX
(0x0F)
/* Reference
Multiplexer Register*/
#define TDACP
(0x10)
/* TDACP Control
Register*/
#define TDACN
(0x11)
/* TDAC Negative
Output Register */
#define GPIOCON (0x12)
/* GPIO
Connection Register Connects GPIO[0] to analog input pin AIN3
0: GPIO[0] not connected to AIN3 (default)
1:
GPIO[0] connected to AIN3*/
#define GPIODIR
(0x13)
/* GPIO
Direction Registe 0: GPIO[0] is an output
(default)
1:
GPIO[0] is an input*/
#define GPIODAT
(0x14)
/* GPIO Data
Register
Configured as an output, read returns the register value
Configured
as an input, write sets the register value only
0: GPIO[0] is low
1:
GPIO[0] is high*/
/* Additional ADS1263
Registers */
#ifdef
ADS1263
#define ADC2CFG
(0x15)
/* ADC2
Configuration Register*/
#define ADC2MUX
(0x16)
/* ADC2 Input
Multiplexer Register*/
#define ADC2OFC0
(0x17)
/* ADC2 Offset
Calibration*/
#define ADC2OFC1
(0x18)
/* ADC2 Offset
Calibration*/
#define ADC2FSC0
(0x19)
/* ADC2
Full-Scale Calibration*/
#define ADC2FSC1
(0x1A)
/* ADC2
Full-Scale Calibration*/
#endif /* ADS1263 */
/* Default Register Values */
//
#define ID_DEFAULT_VALUE
(0x00)
/**/
#define POWER_DEFAULT_VALUE
(0x19)
/**/
#define INTERFACE_DEFAULT_VALUE
(0x05)
/**/
#define MODE0_DEFAULT_VALUE
(0x00)
/**/
#define MODE1_DEFAULT_VALUE
(0x80)
/**/
#define MODE2_DEFAULT_VALUE
(0x04)
/**/
#define INPMUX_DEFAULT_VALUE
(0x01)
/**/
#define OFCAL0_DEFAULT_VALUE
(0x00)
/**/
#define OFCAL1_DEFAULT_VALUE
(0x00)
/**/
#define OFCAL2_DEFAULT_VALUE
(0x00)
/**/
#define FSCAL0_DEFAULT_VALUE (0x00)
/**/
#define FSCAL1_DEFAULT_VALUE
(0x00)
/**/
#define FSCAL2_DEFAULT_VALUE
(0x40)
/**/
#define IDACMUX_DEFAULT_VALUE
(0xBB)
/**/
#define IDACMAG_DEFAULT_VALUE
(0x00)
/**/
#define REFMUX_DEFAULT_VALUE
(0x00)
/**/
#define TDACP_DEFAULT_VALUE
(0x00)
/**/
#define TDACN_DEFAULT_VALUE
(0x00) /**/
#define GPIOCON_DEFAULT_VALUE
(0x00)
/**/
#define GPIODIR_DEFAULT_VALUE
(0x00)
/**/
#define GPIODAT_DEFAULT_VALUE
(0x00)
/**/
#ifdef
ADS1263
#define ADC2CFG_DEFAULT_VALUE
(0x00)
/**/
#define ADC2MUX_DEFAULT_VALUE
(0x01)
/**/
#define ADC2OFC0_DEFAULT_VALUE
(0x00)
/**/
#define ADC2OFC1_DEFAULT_VALUE
(0x00)
/**/
#define ADC2FSC0_DEFAULT_VALUE
(0x00)
/**/
#define ADC2FSC1_DEFAULT_VALUE
(0x40)
/**/
#endif /* ADS1263 */
/* Register Field Definitions */
/* POWER Register Fields
*/
#define RST (0x10)
/*Reset
Indicator
Indicates ADC reset has occurred. Clear this bit to detect the
next device reset.
0: No new reset occurred
1: New reset has occurred (default)*/
#define VBIAS
(0x02) /*Level Shift Voltage Enable
Enables the internal level shift voltage to the AINCOM pin.
VBIAS = (VAVDD + VAVSS)/2
0:
Disabled (default)
1: VBIAS enabled*/
#define INTREF
(0x01)
/*Internal
Reference Enable
Enables the 2.5 V internal voltage reference. Note the IDAC and
temperature sensor require the internal
voltage reference.
0:
Disabled
1: Internal reference enabled (default)*/
/* INTERFACE Register
Fields */
#define TIMEOUT
(0x08)
/*Serial
Interface Time-Out Enable
Enables the serial interface automatic time-out mode
0: Disabled (default)
1: Enable the interface automatic time-out*/
#define STATUS
(0x04)
/*Status Byte
Enable
Enables
the inclusion of the status byte during conversion data
read-back
0: Disabled
1:
Status byte included during conversion data read-back
(default)*/
// #define
CRC1
(0x02)
// #define
CRC0 (0x01)
#define CRC_MASK
(0x03)
/*Checksum Byte
Enable
Enables the inclusion of the checksum byte during conversion
data
read-back*/
//CRC Field
#define
CRC_OFF
(0x00)
/*00: Checksum
byte disabled*/
#define
CRC_CHKSUM
(0x01)
/*Enable
Checksum byte in Checksum mode during conversion data read-back (default)*/
#define
CRC_ON
(0x02)
/*Enable
Checksum byte in CRC mode during conversion data read-back*/
/* MODE0 Register Fields
*/
#define REFREV
(0x80)
/*Reference Mux
Polarity Reversal
Reverses the ADC1 reference multiplexer output polarity
0:
Normal polarity of reference multiplexer output (default)
1: Reverse polarity of reference multiplexer output*/
#define RUNMODE
(0x40) /*ADC Conversion Run Mode
Selects the ADC conversion (run) mode
0: Continuous conversion (default)
1:
Pulse conversion (one shot conversion)*/
// #define
CHOP1
(0x20)
// #define
CHOP0
(0x10)
#define CHOP_MASK
(0x30)
/*Chop Mode Enable
Enables the ADC chop and IDAC rotation options*/
//CHOP Field
#define
CHOP_OFF
(0x00)
/*Input chop and
IDAC rotation disabled (default)*/
#define
CHOP_ON
(0x10)
/*Input chop
enabled*/
#define
CHOP_IDAC
(0x20)
/*IDAC rotation
enabled*/
#define
CHOP_ON_IDAC
(0x30) /*Input chop and IDAC rotation enabled*/
// #define
DELAY3
(0x08)
// #define
DELAY2
(0x04)
// #define
DELAY1
(0x02)
// #define
DELAY0
(0x01)
#define DELAY_MASK
(0x0F)
/*Conversion
Delay
Provides additional delay from conversion start to the beginning
of
the actual conversion*/
//DELAY Field
#define
DELAY_0us
(0x00)
/*no delay
(default)*/
#define
DELAY_8_7us
(0x01)
/*8.7 μs*/
#define DELAY_17us
(0x02)
/*17 μs*/
#define
DELAY_35us
(0x03)
/*35 μs*/
#define
DELAY_69us
(0x04)
/*69 μs*/
#define
DELAY_139us
(0x05)
/*139 μs*/
#define
DELAY_278us
(0x06)
/*278 μs*/
#define
DELAY_555us
(0x07)
/*555 μs*/
#define
DELAY_1100us
(0x08)
/*1.1 ms*/
#define
DELAY_2200us
(0x09)
/*2.2 ms*/
#define
DELAY_4400us
(0x0A)
/*4.4 ms*/
#define
DELAY_8800us
(0x0B)
/*8.8 ms*/
/* MODE1 Register Fields
*/
// #define
FILTER_2
(0x80)
// #define
FILTER_1
(0x40)
// #define
FILTER_0
(0x20)
#define FILTER_MASK
(0xE0)
/*Digital Filter
Configures
the ADC digital filter*/
//DELAY Field
#define
FILTER_SINC1
(0x00)
/*Sinc1 mode*/
#define
FILTER_SINC2
(0x20)
/*Sinc2 mode*/
#define
FILTER_SINC3
(0x40)
/*Sinc3 mode*/
#define
FILTER_SINC4
(0x60)
/*Sinc4 mode*/
#define
FILTER_FIR
(0x80)
/*FIR mode (default)*/
#define SBADC
(0x10)
/*Sensor Bias
ADC Connection
Selects the ADC to connect the sensor bias
0:
Sensor bias connected to ADC1 mux out (default)
1: Sensor bias connected to ADC2 mux out*/
#define SBPOL
(0x08)
/*Sensor Bias
Polarity
Selects the sensor bias for pull-up or pull-down
0: Sensor bias pull-up mode (AINP pulled high, AINN pulled low)
(default)
1: Sensor bias pull-down mode (AINP pulled low, AINN pulled high)*/
// #define
SBMAG2
(0x04)
// #define SBMAG1
(0x02)
// #define
SBMAG0
(0x01)
#define SBMAG_MASK
(0x07)
/*Sensor Bias
Magnitude
Selects the sensor bias
current magnitude or the bias resistor*/
//SBMAG Field
#define
SBMAG_0uA
(0x00)
/*: No sensor
bias current or resistor (default)*/
#define
SBMAG_0_5uA
(0x01)
/*0.5-μA sensor
bias current*/
#define
SBMAG_2uA
(0x02)
/*2-μA sensor
bias current*/
#define
SBMAG_10uA
(0x03)
/*10-μA sensor
bias current*/
#define SBMAG_50uA
(0x04)
/*50-μA sensor
bias current*/
#define
SBMAG_200uA
(0x05)
/*200-μA sensor
bias current*/
#define
SBMAG_10MOhm
(0x06)
/*10-MΩ
resistor*/
/* MODE2 Register Fields
*/
#define BYPASS
(0x80)
/*PGA Bypass
Mode
Selects PGA bypass mode
0: PGA
enabled (default)
1: PGA bypassed*/
// #define
GAIN2
(0x40)
// #define
GAIN1
(0x20)
// #define
GAIN0
(0x10)
#define GAIN_MASK
(0x70)
/*PGA Gain
Selects the PGA gain*/
//GAIN Field
#define
GAIN_1
(0x00)
/*1 V/V
(default)*/
#define
GAIN_2
(0x10)
/*2 V/V*/
#define
GAIN_4
(0x20)
/*4 V/V*/
#define
GAIN_8
(0x30)
/*8 V/V*/
#define
GAIN_16
(0x40)
/*16 V/V*/
#define
GAIN_32
(0x50)
/*32 V/V*/
// #define
DR3
(0x08)
// #define
DR2
(0x04)
// #define
DR1
(0x02)
// #define
DR0
(0x01)
#define DR_MASK
(0x0F)
/*Data Rate
Selects the ADC data rate.
In FIR filter mode, the available data
rates are limited to 2.5, 5, 10 and 20 SPS.*/
//DR Field
#define
DR_2_5_SPS
(0x00) /*2.5 SPS*/
#define
DR_5_SPS
(0x01)
/*5 SPS*/
#define
DR_10_SPS
(0x02)
/*10 SPS*/
#define
DR_16_6_SPS
(0x03)
/*16.6SPS*/
#define DR_20_SPS
(0x04)
/*20 SPS
(default)*/
#define
DR_50_SPS
(0x05)
/*50 SPS */
#define
DR_60_SPS
(0x06)
/*60 SPS*/
#define
DR_100_SPS
(0x07)
/*100 SPS*/
#define
DR_400_SPS
(0x08)
/*400 SPS*/
#define
DR_1200_SPS
(0x09)
/*1200 SPS*/
#define
DR_2400_SPS
(0x0A) /*2400 SPS*/
#define
DR_4800_SPS
(0x0B)
/*4800 SPS*/
#define
DR_7200_SPS
(0x0C)
/*7200 SPS*/
#define
DR_14400_SPS
(0x0D)
/*14400 SPS*/
#define DR_19200_SPS
(0x0E)
/*19200 SPS*/
#define
DR_38400_SPS
(0x0F)
/*38400 SPS*/
/* INPMUX Register Fields
*/
// #define
MUXP_3
(0x80)
// #define
MUXP_2
(0x40)
// #define
MUXP_1
(0x20)
// #define
MUXP_0
(0x10)
#define MUXP_MASK
(0xF0)
/*Positive Input
Multiplexer
Selects
the positive input multiplexer*/
//MUXP Field
#define
MUXP_AIN0
(0x00)
/*AIN0
(default)*/
#define
MUXP_AIN1
(0x10)
/*AIN1*/
#define
MUXP_AIN2
(0x20)
/*AIN2*/
#define
MUXP_AIN3
(0x30)
/*AIN3*/
#define
MUXP_AIN4
(0x40)
/*AIN4*/
#define
MUXP_AIN5
(0x50)
/*AIN5*/
#define
MUXP_AIN6
(0x60)
/*AIN6*/
#define
MUXP_AIN7
(0x70)
/*AIN7*/
#define
MUXP_AIN8
(0x80)
/*AIN8*/
#define
MUXP_AIN9
(0x90)
/*AIN9*/
#define
MUXP_AINCOM
(0xA0)
/*AINCOM*/
#define
MUXP_TEMP
(0xB0)
/*Temperature
sensor monitor positive*/
#define
MUXP_AVDD
(0xC0)
/*Analog power
supply monitor positive*/
#define
MUXP_DVDD
(0xD0)
/*Digital power
supply monitor positive*/
#define
MUXP_TEST (0xE0)
/*TDAC test
signal positive*/
#define
MUXP_NO_CONN
(0xF0)
/*Float (open
connection)*/
// #define
MUXN_3
(0x08)
// #define
MUXN_2
(0x04)
// #define
MUXN_1
(0x02)
// #define
MUXN_0
(0x01)
#define MUXN_MASK
(0x0F)
/*Negative Input
Multiplexer
Selects
the negative input multiplexer*/
//MUXN Field
#define
MUXN_AIN0
(0x00)
/*AIN0*/
#define
MUXN_AIN1
(0x01)
/*AIN1*/
#define
MUXN_AIN2
(0x02)
/*AIN2*/
#define
MUXN_AIN3
(0x03)
/*AIN3*/
#define
MUXN_AIN4
(0x04)
/*AIN4*/
#define
MUXN_AIN5
(0x05)
/*AIN5*/
#define
MUXN_AIN6
(0x06)
/*AIN6*/
#define
MUXN_AIN7
(0x07)
/*AIN7*/
#define
MUXN_AIN8
(0x08)
/*AIN8*/
#define
MUXN_AIN9
(0x09)
/*AIN9*/
#define
MUXN_AINCOM
(0x0A)
/*AINCOM*/
#define
MUXN_TEMP
(0x0B)
/*Temperature
sensor monitor negative*/
#define
MUXN_AVSS
(0x0C)
/*Analog power
supply monitor negative*/
#define
MUXN_DVDD
(0x0D)
/*Digital power
supply monitor negative*/
#define
MUXN_TEST
(0x0E) /*TDAC test signal negative*/
#define
MUXN_NO_CONN
(0x0F)
/*Float (open
connection)*/
//SKIP OFFSET & GAIN CAL REGISTERS
/* IDACMUX Register Fields
*/
// #define
MUX2_3
(0x80)
// #define
MUX2_2
(0x40)
// #define
MUX2_1
(0x20)
// #define
MUX2_0
(0x10)
#define MUX2_MASK
(0xF0)
/*IDAC2 Output
Multiplexer
Selects
the analog input pin to connect IDAC2*/
//MUX2 Field
#define
MUX2_AIN0
(0x00)
/*AIN0*/
#define
MUX2_AIN1
(0x10)
/*AIN1*/
#define
MUX2_AIN2
(0x20)
/*AIN2*/
#define
MUX2_AIN3
(0x30)
/*AIN3*/
#define
MUX2_AIN4
(0x40)
/*AIN4*/
#define
MUX2_AIN5
(0x50)
/*AIN5*/
#define
MUX2_AIN6
(0x60)
/*AIN6*/
#define
MUX2_AIN7
(0x70)
/*AIN7*/
#define
MUX2_AIN8
(0x80)
/*AIN8*/
#define
MUX2_AIN9
(0x90)
/*AIN9*/
#define
MUX2_AINCOM
(0xA0)
/*AINCOM*/
#define
MUX2_NO_CONM
(0xB0)
/*: No
Connection (default)*/
// #define
MUX1_3
(0x08)
// #define
MUX1_2
(0x04)
// #define
MUX1_1
(0x02)
// #define
MUX1_0
(0x01)
#define MUX1_MASK (0x0F)
/*IDAC1 Output
Multiplexer
Selects the analog input pin to connect IDAC1*/
//MUX1 Field
#define
MUX1_AIN0
(0x00)
/*AIN0*/
#define
MUX1_AIN1
(0x01)
/*AIN1*/
#define
MUX1_AIN2
(0x02)
/*AIN2*/
#define
MUX1_AIN3
(0x03)
/*AIN3*/
#define
MUX1_AIN4
(0x04)
/*AIN4*/
#define
MUX1_AIN5
(0x05)
/*AIN5*/
#define
MUX1_AIN6
(0x06)
/*AIN6*/
#define
MUX1_AIN7
(0x07) /*AIN7*/
#define
MUX1_AIN8
(0x08)
/*AIN8*/
#define
MUX1_AIN9
(0x09)
/*AIN9*/
#define
MUX1_AINCOM
(0x0A)
/*AINCOM*/
#define
MUX1_NO_CONM
(0x0B)
/*No Connection
(default)*/
/* IDACMAG Register Fields
*/
// #define
MAG2_3
(0x80)
// #define
MAG2_2
(0x40)
// #define
MAG2_1
(0x20)
// #define
MAG2_0
(0x10)
#define MAG2_MASK
(0xF0)
/*IDAC2 Current
Magnitude
Selects the current values of IDAC2*/
//MAG2 Field
#define
MAG2_OFF
(0x00)
/*off
(default)*/
#define
MAG2_50uA
(0x10)
/*50 μA*/
#define
MAG2_100uA
(0x20)
/*100 μA*/
#define
MAG2_250uA
(0x30)
/*250 μA*/
#define
MAG2_500uA
(0x40)
/*500 μA*/
#define
MAG2_750uA
(0x50)
/*750 μA*/
#define MAG2_1000uA
(0x60)
/*1000 μA*/
#define
MAG2_1500uA
(0x70)
/*1500 μA*/
#define
MAG2_2000uA
(0x80)
/*2000 μA*/
#define
MAG2_2500uA
(0x90)
/*2500 μA*/
#define
MAG2_3000uA
(0xA0)
/*3000 μA*/
// #define
MAG1_3
(0x08)
// #define
MAG1_2
(0x04)
// #define
MAG1_1
(0x02)
// #define
MAG1_0
(0x01)
#define MAG1_MASK
(0xF0)
//MAG1 Field
#define
MAG1_OFF
(0x00)
/*off
(default)*/
#define MAG1_50uA
(0x01)
/*50 μA*/
#define
MAG1_100uA
(0x02)
/*100 μA*/
#define
MAG1_250uA
(0x03)
/*250 μA*/
#define
MAG1_500uA
(0x04) /*500 μA*/
#define
MAG1_750uA
(0x05)
/*750 μA*/
#define
MAG1_1000uA
(0x06)
/*1000 μA*/
#define
MAG1_1500uA
(0x07)
/*1500 μA*/
#define
MAG1_2000uA
(0x08)
/*2000 μA*/
#define
MAG1_2500uA
(0x09)
/*2500 μA*/
#define
MAG1_3000uA
(0x0A)
/*3000 μA*/
/* REFMUX Register Fields
*/
// #define RMUXP_2
(0x20)
// #define
RMUXP_1
(0x10)
// #define
RMUXP_0
(0x08)
#define RMUXP_MASK
(0x38)
/*Reference
Positive Input
Selects
the positive reference input*/
//MUXP Field
#define
RMUXP_INTP
(0x00)
/*Internal 2.5 V
reference - P (default*/
#define
RMUXP_AIN0
(0x08)
/*External
AIN0*/
#define
RMUXP_AIN2
(0x10)
/*External
AIN2*/
#define
RMUXP_AIN4
(0x18)
/*External
AIN4*/
#define
RMUXP_AVDD (0x20)
/*Internal
analog supply (VAVDD )*/
// #define
RMUXN_2
(0x04)
// #define
RMUXN_1
(0x02)
// #define
RMUXN_0
(0x01)
#define RMUXN_MASK (0x07)
/*Reference
Negative Input
Selects the negative reference input*/
//MUXN Field
#define
RMUXN_INTN
(0x00)
/*Internal 2.5 V
reference - N (default)*/
#define
RMUXN_AIN1
(0x01)
/*External
AIN1*/
#define
RMUXN_AIN3
(0x02)
/*External
AIN3*/
#define
RMUXN_AIN5
(0x03)
/*External
AIN5*/
#define
RMUXN_AVSS
(0x04)
/*Internal
analog supply (VAVSS)*/
/* TDACP Register Fields
*/
#define OUTP
(0x80)
/*TDACP Output
Connection
Connects TDACP output to pin AIN6*/
//OUTP Field
#define
OUTP_NO_CONN
(0x00)
/*No
connection*/
#define
OUTP_AIN6
(0x80)
/*TDACP output
connected to pin AIN6*/
// #define
MAGP4
(0x10)
// #define
MAGP3
(0x08)
// #define
MAGP2
(0x04)
// #define
MAGP1
(0x02)
// #define
MAGP0
(0x01)
#define MAGP_MASK
(0x1F)
/*MAGP Output
Magnitude
Select the TDACP output magnitude. The TDAC output voltages
are ideal and are with respect to VAVSS*/
//MAGP Field
#define
MAGP_0_9_AVDD
(0x09)
/*4.5 V*/
#define
MAGP_0_7_AVDD
(0x08)
/*3.5 V*/
#define
MAGP_0_6_AVDD
(0x07)
/*3 V*/
#define
MAGP_0_55_AVDD
(0x06)
/*2.75 V*/
#define
MAGP_0_525_AVDD
(0x05) /*2.625 V*/
#define
MAGP_0_5125_AVDD
(0x04)
/*2.5625 V*/
#define
MAGP_0_50625_AVDD
(0x03)
/*2.53125 V*/
#define
MAGP_0_503125_AVDD
(0x02)
/*2.515625 V*/
#define MAGP_0_5015625_AVDD
(0x01)
/*2.5078125 V*/
#define
MAGP_0_5_AVDD
(0x00)
/*2.5 V*/
#define
MAGP_0_4984375_AVDD
(0x11)
/*2.4921875 V*/
#define
MAGP_0_496875_AVDD
(0x12)
/*2.484375 V*/
#define
MAGP_0_49375_AVDD
(0x13)
/*2.46875 V*/
#define
MAGP_0_4875_AVDD
(0x14)
/*2.4375 V */
#define
MAGP_0_475_AVDD
(0x15)
/*2.375 V*/
#define
MAGP_0_45_AVDD
(0x16)
/*2.25 V*/
#define
MAGP_0_4_AVDD
(0x17)
/*2 V*/
#define
MAGP_0_3_AVDD
(0x18)
/*1.5 V*/
#define MAGP_0_1_AVDD
(0x19)
/*0.5 V*/
/* TDACN Register Fields
*/
#define OUTN
(0x80)
/*TDACN Output
Connection
Connects TDACN output to pin AIN7*/
//OUTN Field
#define
OUTN_NO_CONN
(0x00)
/*No external
connection*/
#define
OUTN_AIN7
(0x80)
/*TDACN output
connected to pin AIN7*/
// #define
MAGN4
(0x10)
// #define
MAGN3
(0x08)
// #define
MAGN2
(0x04)
// #define
MAGN1
(0x02)
// #define
MAGN0
(0x01)
#define MAGN_MASK
(0x1F)
/*TDACN Output
Magnitude
Select the TDACN output magnitude. The TDAC output voltages
are
ideal and are with respect to VAVSS
*/
//MAGN Field
#define
MAGN_0_9_AVSS
(0x09)
/*4.5 V*/
#define
MAGN_0_7_AVSS
(0x08)
/*3.5 V*/
#define
MAGN_0_6_AVSS
(0x07)
/*3 V*/
#define
MAGN_0_55_AVSS
(0x06)
/*2.75 V*/
#define
MAGN_0_525_AVSS
(0x05)
/*2.625 V*/
#define
MAGN_0_5125_AVSS
(0x04)
/*2.5625 V*/
#define
MAGN_0_50625_AVSS
(0x03)
/*2.53125 V*/
#define
MAGN_0_503125_AVSS
(0x02)
/*2.515625 V*/
#define
MAGN_0_5015625_AVSS
(0x01)
/*2.5078125 V*/
#define
MAGN_0_5_AVSS
(0x00)
/*2.5 V*/
#define
MAGN_0_4984375_AVSS
(0x11)
/*2.4921875 V*/
#define
MAGN_0_496875_AVSS
(0x12)
/*2.484375 V*/
#define
MAGN_0_49375_AVSS
(0x13)
/*2.46875 V*/
#define
MAGN_0_4875_AVSS
(0x14)
/*2.4375 V*/
#define
MAGN_0_475_AVSS (0x15)
/*2.375 V*/
#define
MAGN_0_45_AVSS
(0x16)
/*2.25 V*/
#define
MAGN_0_4_AVSS
(0x17)
/*2 V*/
#define
MAGN_0_3_AVSS
(0x18)
/*1.5 V*/
#define
MAGN_0_1_AVSS
(0x19)
/*0.5 V*/
/* GPIOCON Register Fields
*/
#define CON7_AINCOM
(0x80)
/*Connects
GPIO[7] to analog input pin AINCOM
0:
GPIO[0] not connected to AINCOM (default)
1: GPIO[0] connected to AINCOM*/
#define CON6_AIN09
(0x40)
/*Connects
GPIO[6] to analog input pin AIN9
0: GPIO[0] not connected to AIN9 (default)
1: GPIO[0] connected to AIN9*/
#define CON5_AIN08 (0x20)
/*Connects
GPIO[5] to analog input pin AIN8
0: GPIO[0] not connected to AIN8 (default)
1: GPIO[0] connected to AIN8*/
#define CON4_AIN07
(0x10)
/*Connects
GPIO[4] to analog input pin AIN7
0: GPIO[0] not connected to AIN7 (default)
1:
GPIO[0] connected to AIN7*/
#define CON3_AIN06
(0x08)
/*Connects
GPIO[3] to analog input pin AIN6
0: GPIO[0] not connected to AIN6 (default)
1: GPIO[0] connected to AIN6*/
#define CON2_AIN05
(0x04)
/*Connects
GPIO[2] to analog input pin AIN5
0:
GPIO[0] not connected to AIN5 (default)
1: GPIO[0] connected to AIN5*/
#define CON1_AIN04
(0x02)
/*Connects GPIO[1] to analog input pin
AIN4
0: GPIO[0] not connected to AIN4 (default)
1: GPIO[0] connected to AIN4*/
#define CON0_AIN03
(0x01)
/*Connects
GPIO[0] to analog input pin AIN3
0: GPIO[0] not connected to AIN3 (default)
1:
GPIO[0] connected to AIN3*/
/* GPIODIR Register Fields
*/
#define DIR7_AINCOM
(0x80)
/*Configures
GPIO[7] as a GPIO input or GPIO output AINCOM
0:
GPIO[0] is an output (default)
1: GPIO[0] is an input
*/
#define DIR6_AIN09
(0x40) /*Configures GPIO[6] as a GPIO input or
GPIO output AIN9
0: GPIO[0] is an output (default)
1: GPIO[0] is an input
*/
#define DIR5_AIN08
(0x20)
/*Configures
GPIO[5] as a GPIO input or GPIO output AIN8
0: GPIO[0] is an output (default)
1: GPIO[0] is an input
*/
#define DIR4_AIN07
(0x10)
/*Configures
GPIO[4] as a GPIO input or GPIO output AIN7
0: GPIO[0] is an output (default)
1: GPIO[0] is an input
*/
#define DIR3_AIN06
(0x08)
/*Configures
GPIO[3] as a GPIO input or GPIO output AIN6
0: GPIO[0] is an output (default)
1: GPIO[0] is an input
*/
#define DIR2_AIN05
(0x04)
/*Configures
GPIO[2] as a GPIO input or GPIO output AIN5
0: GPIO[0] is an output (default)
1: GPIO[0] is an input
*/
#define DIR1_AIN04
(0x02)
/*Configures
GPIO[1] as a GPIO input or GPIO output AIN4
0: GPIO[0] is an output (default)
1:
GPIO[0] is an input
*/
#define DIR0_AIN03
(0x01)
/*Configures
GPIO[0] as a GPIO input or GPIO output AIN3
0: GPIO[0] is an output (default)
1: GPIO[0] is an input
*/
/* GPIODAT Register Fields
*/
#define DAT7_AINCOM
(0x80)
/*Configured as
an output, read returns the register value
Configured as an input, write sets the register value only
0: GPIO[0] is low
1: GPIO[0] is high
*/
#define DAT6_AIN09
(0x40)
/*Configured as
an output, read returns the register value
Configured as an input, write sets the register value only
0:
GPIO[0] is low
1: GPIO[0] is high
*/
#define DAT5_AIN08 (0x20)
/*Configured as
an output, read returns the register value
Configured as an input, write sets the register value only
0:
GPIO[0] is low
1: GPIO[0] is high
*/
#define DAT4_AIN07
(0x10)
/*Configured as an output, read returns
the register value
Configured as an input, write sets the register value only
0: GPIO[0] is low
1: GPIO[0] is high
*/
#define DAT3_AIN06
(0x08)
/*Configured as
an output, read returns the register value
Configured as an input, write sets the register value only
0: GPIO[0] is low
1:
GPIO[0] is high
*/
#define DAT2_AIN05
(0x04)
/*Configured as
an output, read returns the register value
Configured
as an input, write sets the register value only
0: GPIO[0] is low
1:
GPIO[0] is high
*/
#define DAT1_AIN04
(0x02)
/*Configured as
an output, read returns the register value
Configured
as an input, write sets the register value only
0: GPIO[0] is low
1: GPIO[0] is high
*/
#define DAT0_AIN03
(0x01)
/*Configured as
an output, read returns the register value
Configured as an input, write sets the register value only
0: GPIO[0] is low
1: GPIO[0] is high
*/
/*
Additional ADS1263 Registers */
#ifdef
ADS1263
/* ADC2CFG Register Fields */
//
#define DR2_1
(0x80)
//
#define DR2_0
(0x40)
#define DR2_MASK
(0xC0)
/*ADC2 Data Rate
These bits select the data rate of ADC2*/
//DR_2 Field
#define
DR2_10SPS
(0x00)
/*10 SPS
(default)*/
#define
DR2_100SPS
(0x40)
/*100 SPS*/
#define
DR2_400SPS
(0x80)
/*400 SPS*/
#define
DR2_800SPS
(0xC0)
/*800 SPS*/
//
#define REF2_2
(0x20)
//
#define REF2_1
(0x10)
//
#define REF2_0
(0x08)
#define
REF2_MASK
(0x38)
/*ADC2 Reference
Input
Selects the reference inputs of ADC2 as positive and negative
pairs*/
//REF2 Field
#define REF2_INTP_INTN (0x00)
/*Internal 2.5 V
reference, positive and negative (default)*/
#define
REF2_AIN0_AIN1
(0x08)
/*External AIN0
and AIN1 pin pairs as positive and negative*/
#define REF2_AIN2_AIN3 (0x10)
/*External AIN2
and AIN3 pin pairs as positive and negative*/
#define
REF2_AIN4_AIN5
(0x18)
/*External AIN4
and AIN5 pin pairs as positive andnegative*/
#define REF2_AVDD_AVSS (0x38)
/*Internal VAVDD
and VAVSS*/
//
#define GAIN2_2
(0x04)
//
#define GAIN2_1
(0x02)
//
#define GAIN2_0
(0x01)
#define
GAIN2_MASK
(0x07)
/*ADC2 Gain
These bits configure the gain of ADC2*/
//GAIN2 Field
#define
GAIN2_1
(0x00) /*1 V/V (default)*/
#define
GAIN2_2
(0x01)
/*2 V/V*/
#define
GAIN2_4
(0x02)
/*4 V/V*/
#define
GAIN2_8
(0x03)
/*8 V/V*/
#define GAIN2_16
(0x04)
/*16 V/V*/
#define
GAIN2_32
(0x05)
/*32 V/V*/
#define
GAIN2_64
(0x06)
/*64 V/V*/
#define
GAIN2_128 (0x07)
/*128 V/V*/
/* ADC2MUX Register Fields */
//
#define MUXP2_3
(0x80)
//
#define MUXP2_2
(0x40)
//
#define MUXP2_1
(0x20)
//
#define
MUXP2_0
(0x10)
#define
MUXP2_MASK
(0xF0)
/*ADC2 Positive
Input Multiplexer
Selects the ADC2 positive input*/
//MUXP2 Field
#define
MUXP2_AIN0
(0x00)
/*AIN0
(default)*/
#define
MUXP2_AIN1
(0x10)
/*AIN1*/
#define
MUXP2_AIN2
(0x20)
/*AIN2*/
#define MUXP2_AIN3
(0x30)
/*AIN3*/
#define
MUXP2_AIN4
(0x40)
/*AIN4*/
#define
MUXP2_AIN5
(0x50)
/*AIN5*/
#define
MUXP2_AIN6
(0x60)
/*AIN6*/
#define
MUXP2_AIN7
(0x70)
/*AIN7*/
#define
MUXP2_AIN8
(0x80)
/*AIN8*/
#define
MUXP2_AIN9
(0x90)
/*AIN9*/
#define MUXP2_AINCOM
(0xA0)
/*AINCOM*/
#define
MUXP2_TEMP
(0xB0)
/*Temperature
sensor monitor positive*/
#define
MUXP2_AVDD
(0xC0)
/*Analog power
supply monitor positive*/
#define
MUXP2_DVDD
(0xD0)
/*Digital power
supply monitor positive*/
#define
MUXP2_TEST
(0xE0)
/*TDAC test
signal positive*/
#define
MUXP2_NO_CONN
(0xF0)
/*Open
connection*/
//
#define MUXN2_3
(0x08)
//
#define MUXN2_2
(0x04)
//
#define MUXN2_1
(0x02)
//
#define MUXN2_0
(0x01)
#define
MUXN2_MASK
(0x0F)
/*ADC2 Negative
Input Multiplexer
Selects the ADC2 negative input*/
//MUXN2 Field
#define MUXN2_AIN0
(0x00)
/*AIN0*/
#define
MUXN2_AIN1
(0x01)
/*AIN*/
#define
MUXN2_AIN2
(0x02)
/*AIN*/
#define
MUXN2_AIN3
(0x03) /*AIN*/
#define
MUXN2_AIN4
(0x04)
/*AIN*/
#define
MUXN2_AIN5
(0x05)
/*AIN*/
#define
MUXN2_AIN6
(0x06)
/*AIN*/
#define
MUXN2_AIN7
(0x07)
/*AIN*/
#define
MUXN2_AIN8
(0x08)
/*AIN*/
#define
MUXN2_AIN9
(0x09)
/*AIN*/
#define
MUXN2_AINCOM
(0x0A)
/*AIN*/
#define
MUXN2_TEMP
(0x0B)
/*Temperature
sensor monitor negative*/
#define
MUXN2_AVSS
(0x0C)
/*Analog power
supply monitor negative*/
#define
MUXN2_DVDD (0x0D)
/*Digital power
supply monitor negative*/
#define
MUXN2_TEST
(0x0E)
/*TDAC test
signal negative*/
#define
MUXN2_NO_CONN
(0x0F)
/*Open
Connection*/
//SKIP ADC2 OFFSET & GAIN CAL
REGISTERS
#endif /* ADS1263 */
//END ADC DEFINITIONS
/* Function Prototypes */
// Low level
void set_adc_CS(uint8_t state);
// CS pin
control
void set_adc_START(uint8_t state);
// START pin control
unsigned char ADS126xXferByte (unsigned char cData); // receive byte, simultaneously send
data - this function realizes all
// necessary
functionality, the other Send/Receive methods are only
// designed to
improve readability of the code
// Higher level
int32_t ADS126xReadData(uint8_t NumBytes, uint8_t DataByteStartNum);
//int32_t ADS126xREADandWRITE(int NumDatBytes, int StartAddress, int NumRegs, unsigned char * pdata);
//unsigned char ADS126xReadADC2Data(bufferType_t *readbuffer);
// read a number of consecutive
registers to a given array pointer
void ADS126xReadRegister(int StartAddress, int NumRegs, unsigned char *pdata);
// write a number of consecutive
registers from a given array pointer
void ADS126xWriteRegister(int StartAddress, int NumRegs, unsigned char *pdata);
// Reset by command (alternative to pin)
void ADS126xSendResetCommand(void);
// Start by command (alternative to pin)
void ADS126xSendStartCommand(void);
void ADS126xSendStopCommand(void);
void ADS126xSendADC2StartCommand(void);
void ADS126xSendADC2StopCommand(void);
#endif /* ADS126X_H_ */
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