最新库的gpio.c文件里//*****************************************************************************
//
//! Configures the alternate function of a GPIO pin.
//!
//! \param ulPinConfig is the pin configuration value, specified as only one of
//! the \b GPIO_P??_??? values.
//!
//! This function configures the pin mux that selects the peripheral function
//! associated with a particular GPIO pin. Only one peripheral function at a
//! time can be associated with a GPIO pin, and each peripheral function should
//! only be associated with a single GPIO pin at a time (despite the fact that
//! many of them can be associated with more than one GPIO pin).
//!
//! The available mappings are supplied on a per-device basis in
//! pin_map.h. The \b PART_IS_ define will enable the
//! appropriate set of defines for the device that is being used.
//!
//! \note This function is not valid on Sandstorm, Fury, and Dustdevil-class
//! devices.
//!
//! \return None.
//
//*****************************************************************************
void
GPIOPinConfigure(unsigned long ulPinConfig)
{
unsigned long ulBase, ulShift;
//
// Check the argument.
//
ASSERT(((ulPinConfig >> 16) & 0xff) < 15);
ASSERT(((ulPinConfig >> 8) & 0xe3) == 0);
//
// Extract the base address index from the input value.
//
ulBase = (ulPinConfig >> 16) & 0xff;
//
// Get the base address of the GPIO module, selecting either the APB or the
// AHB aperture as appropriate.
//
if(HWREG(SYSCTL_GPIOHBCTL) & (1 << ulBase))
{
ulBase = g_pulGPIOBaseAddrs[(ulBase << 1) + 1];
}
else
{
ulBase = g_pulGPIOBaseAddrs[ulBase << 1];
}
//
// Extract the shift from the input value.
//
ulShift = (ulPinConfig >> 8) & 0xff;
//
// Write the requested pin muxing value for this GPIO pin.
//
HWREG(ulBase + GPIO_O_PCTL) = ((HWREG(ulBase + GPIO_O_PCTL) &
~(0xf << ulShift)) |
((ulPinConfig & 0xf) << ulShift));
}
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发表于 2012-7-19 14:07
//*****************************************************************************
//
//! Configures the alternate function of a GPIO pin.
//!
//! \param ulPinConfig is the pin configuration value, specified as only one of
//! the \b GPIO_P??_??? values.
//!
//! This function configures the pin mux that selects the peripheral function
//! associated with a particular GPIO pin. Only one peripheral function at a
//! time can be associated with a GPIO pin, and each peripheral function should
//! only be associated with a single GPIO pin at a time (despite the fact that
//! many of them can be associated with more than one GPIO pin).
//!
//! The available mappings are supplied on a per-device basis in
//! pin_map.h. The \b PART_IS_ define will enable the
//! appropriate set of defines for the device that is being used.
//!
//! \note This function is not valid on Sandstorm, Fury, and Dustdevil-class
//! devices.
//!
//! \return None.
//
//*****************************************************************************
void
GPIOPinConfigure(unsigned long ulPinConfig)
{
unsigned long ulBase, ulShift;
//
// Check the argument.
//
ASSERT(((ulPinConfig >> 16) & 0xff) < 15);
ASSERT(((ulPinConfig >> 8) & 0xe3) == 0);
//
// Extract the base address index from the input value.
//
ulBase = (ulPinConfig >> 16) & 0xff;
//
// Get the base address of the GPIO module, selecting either the APB or the
// AHB aperture as appropriate.
//
if(HWREG(SYSCTL_GPIOHBCTL) & (1 << ulBase))
{
ulBase = g_pulGPIOBaseAddrs[(ulBase << 1) + 1];
}
else
{
ulBase = g_pulGPIOBaseAddrs[ulBase << 1];
}
//
// Extract the shift from the input value.
//
ulShift = (ulPinConfig >> 8) & 0xff;
//
// Write the requested pin muxing value for this GPIO pin.
//
HWREG(ulBase + GPIO_O_PCTL) = ((HWREG(ulBase + GPIO_O_PCTL) &
~(0xf << ulShift)) |
((ulPinConfig & 0xf) << ulShift));
}