交流有效值FPGA实用程序

eeleader

交流有效值FPGA实用程序 [复制链接]

clk: 系统时钟；rst:复位信号

clk1us: 对交流信号采样的时钟；

pulse: 交流信号过零方波

data: 正弦输入数据

rms_div:在一个周期按采样间隔取样数据所求的和

rms_by:在一个周期按采样间隔累加数据和值

 

交流信号的RMS=(rms_div/rms_by)x1.1

 

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_signed.all;
entity get_rms is
port
   (
     clk:    in std_logic;
     rst:    in std_logic;
     clk1us: in std_logic; 
    -- fre    :in std_logic;  
     pulse : in std_logic;
     data:   in std_logic_vector(15 downto 0);
     rms_div:    out std_logic_vector(31 downto 0);
     rms_by :     out std_logic_vector(15 downto 0)
    );
end get_rms;

architecture arch_get_rms of get_rms is

---------computer low fre-5HZ, max vol 16384V-------------

signal pulse_reg : std_logic;
signal get_rms_state:std_logic_vector(2 downto 0);
signal rms_sum:std_logic_vector(31 downto 0);   
signal rms_cnt: std_logic_vector(15 downto 0);
signal cnt:std_logic_vector(4 downto 0);

begin
process(clk,rst)
begin
if (rst='0') then
  pulse_reg<='0';
  get_rms_state<="000";
  rms_cnt<=(others=>'0');
  rms_sum<=(others=>'0');
  rms_div<=(others=>'0');
  rms_by<=(others=>'1');
elsif clk'event and clk='1' then
   pulse_reg<=pulse;
  if (get_rms_state="000") then
      if (pulse_reg='0') and (pulse='1') then
            get_rms_state<="001";
      else
           get_rms_state<="010";
      end if;
  elsif (get_rms_state="010") then
     if (data(15)='0') then
         rms_sum<=rms_sum+(data(15)&data(15)&data(15)&data(15)&data(15)&data(15)&data(15)&data(15)&data);
     elsif (data(15)='1') then
        rms_sum<=rms_sum+(x"0000"-(data(15)&data(15)&data(15)&data(15)&data(15)&data(15)&data(15)&data(15)&data));
     end if;
     rms_cnt<=rms_cnt+x"0001";
     get_rms_state<="011";
 elsif (get_rms_state="011") then
   ------200
     if (cnt="11111") then     ----32 us  ------
          cnt<="00000";
          get_rms_state<="000";
     elsif (clk1us='1') then
         cnt<=cnt+"00001";
     end if;
 elsif (get_rms_state="001") then
        rms_div<=rms_sum;
        rms_by<=rms_cnt;
        get_rms_state<="100";
 elsif (get_rms_state="100") then
        rms_sum<=(others=>'0');
        rms_cnt<=(others=>'0');
        get_rms_state<="000";
 else
        pulse_reg<='0';
        get_rms_state<="000";
        rms_cnt<=(others=>'1');
        rms_sum<=(others=>'0');
        rms_div<=(others=>'0');
        rms_by<=(others=>'1');
 end if;
 end if ;
 end process;
 end arch_get_rms;