SD16CTL = 0x800 + SD16SSEL_1 // Clock selection: SMCLK + (Amp: )
| SD16DIV_1 //divide by 4 to give 1MHz clock
| SD16VMIDON //Swtich on external reference for the wheatstone bridge
| SD16REFON // Use internal reference
;
SD16CONF1 |= 0x40; // Delay of ADC clock = 40ns
SD16INCTL0=INCH_0+GAIN_1; //SD16_1 route to I1+/- input, Gain = 1
SD16CCTL0 |= GRP+SNGL+DF; //2's compliment output, single shot
//group conversion mode
SD16INCTL1 = INCH_1+GAIN_1; //SD16_1 route to I2+/- input, Gain = 16
SD16CCTL1 |= GRP+SNGL+DF; //SD16IE+DF;
//2's compliment output, single shot
//group conversion mode
SD16INCTL2=INCH_2+GAIN_1;; //SD16_1 route to V+/- input, Gain = 1
SD16CCTL2|=SNGL+DF; //2's compliment output, single shot
//master of the group conversion