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为什么synplify综合成锁存器 [复制链接]

我觉得用尽了手段,没办法做成组合逻辑,不管怎么样,synplify都顽固的坚持是锁存器哪位高手指导一下,为什么synplify综合成锁存器
以下是代码:
always @ ( * )
begin
  flash_read_data=1'b0;
  fifo_write_data=1'b0;
  read_status=1'b0;
  flash_chip_erase=1'b0;
  flash_block_erase=1'b0;
  flash_sector_erase=1'b0;
  write_addr=1'b0;
  case({s_stb_i&s_cyc_i,s_addr_i[2:0],s_we_i})//synthesis full_case parallel_case
   5'b1_000_0: flash_read_data=1'b1;
   5'b1_000_1: fifo_write_data=1'b1;//Ö»ÊÇдÈ뻺³åÇø
   5'b1_001_0: read_status=1'b1;
   5'b1_010_1: write_addr=1'b1;//²Ù×÷µØÖ·ÔÝ´æ
   5'b1_011_1: flash_chip_erase=1'b1;
   5'b1_100_1: flash_block_erase=1'b1;
   5'b1_101_1: flash_sector_erase=1'b1;
   default:
    begin
     flash_read_data=1'b0;
     fifo_write_data=1'b0;
     read_status=1'b0;
     flash_chip_erase=1'b0;
     flash_block_erase=1'b0;
     flash_sector_erase=1'b0;
     write_addr=1'b0;
    end
      
  endcase
end


综合结果:

@W: CL118 :"D:\ledtx\txsource\txsource\spiif.v":233:2:233:5|Latch generated from always block for signal write_addr, probably caused by a missing assignment in an if or case stmt
@W: CL118 :"D:\ledtx\txsource\txsource\spiif.v":233:2:233:5|Latch generated from always block for signal read_status, probably caused by a missing assignment in an if or case stmt
@W: CL118 :"D:\ledtx\txsource\txsource\spiif.v":233:2:233:5|Latch generated from always block for signal flash_read_data, probably caused by a missing assignment in an if or case stmt
@W: CL118 :"D:\ledtx\txsource\txsource\spiif.v":233:2:233:5|Latch generated from always block for signal flash_chip_erase, probably caused by a missing assignment in an if or case stmt
@W: CL118 :"D:\ledtx\txsource\txsource\spiif.v":233:2:233:5|Latch generated from always block for signal flash_block_erase, probably caused by a missing assignment in an if or case stmt
@W: CL118 :"D:\ledtx\txsource\txsource\spiif.v":233:2:233:5|Latch generated from always block for signal fifo_write_data, probably caused by a missing assignment in an if or case stmt
@W: CL118 :"D:\ledtx\txsource\txsource\spiif.v":233:2:233:5|Latch generated from always block for signal flash_sector_erase, probably caused by a missing assignment in an if or case stmt
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