PIC32代码烧写成功，但不运行

asdmaill

PIC32代码烧写成功，但不运行 [复制链接]

 

如题，编译器都提示烧写成功了，但程序没跑起来，MCLR引脚一直低电平，所有IO口高电平，片子始终处于复位的状态，是哪里没做对吗

mzb2012

额，首先你得排除是硬件的问题，还是你的程序配置问题

asdmaill

硬件的话，都能正确烧写，应该没问题吧，且烧写过程中我那电压表测量了MCLR引脚，该高电平的时候都是正确的，估计是配置问题，但就是不知道是哪里配置的问题，昨晚搞到2点过才睡

tiankai001

看看时钟配置把，

asdmaill

用的内部FRC

ddllxxrr

检查复位有无及晶振的配置，应是配置问题。

asdmaill

关键是MCLR引脚怎么会是一直低电平呢，即便没配置正确，复位是硬件控制的啊

asdmaill

#pragma config FMIIEN = ON              // Ethernet RMII/MII Enable (MII Enabled)
#pragma config FETHIO = ON              // Ethernet I/O Pin Select (Default Ethernet I/O)
#pragma config PGL1WAY = ON             // Permission Group Lock One Way Configuration (Allow only one reconfiguration)
#pragma config PMDL1WAY = ON            // Peripheral Module Disable Configuration (Allow only one reconfiguration)
#pragma config IOL1WAY = ON             // Peripheral Pin Select Configuration (Allow only one reconfiguration)
#pragma config FUSBIDIO = ON            // USB USBID Selection (Controlled by the USB Module)

// DEVCFG2
#pragma config FPLLIDIV = DIV_8         // System PLL Input Divider (8x Divider)
#pragma config FPLLRNG = RANGE_34_68_MHZ// System PLL Input Range (34-68 MHz Input)
#pragma config FPLLICLK = PLL_FRC       // System PLL Input Clock Selection (FRC is input to the System PLL)
#pragma config FPLLMULT = MUL_128       // System PLL Multiplier (PLL Multiply by 128)
#pragma config FPLLODIV = DIV_32        // System PLL Output Clock Divider (32x Divider)
#pragma config UPLLFSEL = FREQ_24MHZ    // USB PLL Input Frequency Selection (USB PLL input is 24 MHz)

// DEVCFG1
#pragma config FNOSC = FRCDIV           // Oscillator Selection Bits (Fast RC Osc w/Div-by-N (FRCDIV))
#pragma config DMTINTV = WIN_127_128    // DMT Count Window Interval (Window/Interval value is 127/128 counter value)
#pragma config FSOSCEN = OFF             // Secondary Oscillator Enable (Enable SOSC)
#pragma config IESO = ON                // Internal/External Switch Over (Enabled)
#pragma config POSCMOD = OFF            // Primary Oscillator Configuration (Primary osc disabled)
#pragma config OSCIOFNC = OFF           // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FCKSM = 0//CSECME           // Clock Switching and Monitor Selection (Clock Switch Enabled, FSCM Enabled)
#pragma config WDTPS = PS1048576        // Watchdog Timer Postscaler (1:1048576)
#pragma config WDTSPGM = STOP           // Watchdog Timer Stop During Flash Programming (WDT stops during Flash programming)
#pragma config WINDIS = NORMAL          // Watchdog Timer Window Mode (Watchdog Timer is in non-Window mode)
#pragma config FWDTEN = 0//OFF             // Watchdog Timer Enable (WDT Disabled)
#pragma config FWDTWINSZ = WINSZ_25     // Watchdog Timer Window Size (Window size is 25%)
#pragma config DMTCNT = DMT31           // Deadman Timer Count Selection (2^31 (2147483648))
#pragma config FDMTEN = 0//OFF              // Deadman Timer Enable (Deadman Timer is enabled)

// DEVCFG0
#pragma config DEBUG = OFF               // Background Debugger Enable (Debugger is enabled)
#pragma config JTAGEN = OFF             // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx1        // ICE/ICD Comm Channel Select (Communicate on PGEC1/PGED1)
#pragma config TRCEN = OFF               // Trace Enable (Trace features in the CPU are enabled)
#pragma config BOOTISA = 0//MIPS32         // Boot ISA Selection (Boot code and Exception code is MIPS32)
#pragma config FECCCON = OFF_UNLOCKED   // Dynamic Flash ECC Configuration (ECC and Dynamic ECC are disabled (ECCCON bits are writable))
#pragma config FSLEEP = OFF             // Flash Sleep Mode (Flash is powered down when the device is in Sleep mode)
#pragma config DBGPER = PG_ALL          // Debug Mode CPU Access Permission (Allow CPU access to all permission regions)
#pragma config SMCLR = 0//MCLR_POR        // Soft Master Clear Enable bit (MCLR pin generates a normal system Reset)
#pragma config SOSCGAIN = GAIN_2X       // Secondary Oscillator Gain Control bits (2x gain setting)
#pragma config SOSCBOOST = ON           // Secondary Oscillator Boost Kick Start Enable bit (Boost the kick start of the oscillator)
#pragma config POSCGAIN = GAIN_2X       // Primary Oscillator Gain Control bits (2x gain setting)
#pragma config POSCBOOST = ON           // Primary Oscillator Boost Kick Start Enable bit (Boost the kick start of the oscillator)
#pragma config EJTAGBEN = NORMAL        // EJTAG Boot (Normal EJTAG functionality)

// DEVCP0
#pragma config CP = OFF                 // Code Protect (Protection Disabled)
#include
以上是配置代码，用的内部FRC

asdmaill

看门狗，程序监控定时器都关闭了

asdmaill

asdmaill

上面是我的下载和复位电路，之前使用DSPIC，一直用的这个电路，都没问题的

dl265361

检查下硬件

asdmaill

检查了，对芯片补焊了一下，情况依旧

asdmaill

用示波器看了下电源的纹波啥的，也都正常的

ienglgge

asdmaill 发表于 2018-2-5 16:32
用示波器看了下电源的纹波啥的，也都正常的

复位和晶振，电源，都检查一下焊接。测一下波形。换个原来正常的程序试试。

asdmaill

自己做的板子，现在测试的代码就是才写好，准备测试下板子用的

asdmaill

MCLR引脚怎么会一直都是低电平呢，而烧写代码的时候又是正确的，能被拉到3.3V，烧写完后，MCLR就一直低电平

asdmaill

我将电源断开，IPE能提示目标移除，接上电源，IPE就提示目标发现，然后就显示器件ID版本号A1

asdmaill

因此我认为硬件没什么问题，而是配置上的问题，应该是DEVCFG那几个配置寄存器没配置对，但又不知道会是哪个位没有配置正确

电子微创意

配置位只配置时钟和ICSP引脚，其他保持默认应该没问题的。实在不济建议将SW1和C2去掉，直接将MCLR用电阻拉高。