SEED与SEED 560 仿真问题

crusadelee

SEED与SEED 560 仿真问题 [复制链接]

在开发DSP2812时出现 ：SEED XDS560PLUS 能够正常运行。

SD XDS560V2 STM 提示出错：SC_ERR_CTL_NO_TRG_CLOCK

那位大侠能够指点

crusadelee

[Start]

Execute the command:

%ccs_base%/common/uscif/dbgjtag.exe -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\Users\ADMINI~1\AppData\Local\.TI\2989677074\
    0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 560/2xx-class product.
This utility will load the program 'sd560v2u.out'.
The library build date was 'May 30 2012'.
The library build time was '23:17:26'.
The library package version is '5.0.747.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.

An error occurred while hard opening the controller.

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI's USCIF driver or utilities.

The value is '-181' (0xffffff4b).
The title is 'SC_ERR_CTL_NO_TRG_CLOCK'.

The explanation is:
The controller has detected a dead JTAG clock.
The user must turn-on or connect the JTAG clock for the target.

[End]

crusadelee

发现JATG TCLK 的时钟500K只有200MV