//*****************************************************************************************
// CC1100 STROBE, CONTROL AND STATUS REGSITER
#define CC1101_IOCFG2 0x00 // GDO2 output pin configuration
#define CC1101_IOCFG1 0x01 // GDO1 output pin configuration
#define CC1101_IOCFG0 0x02 // GDO0 output pin configuration
#define CC1101_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds
#define CC1101_SYNC1 0x04 // Sync word, high uint8_t
#define CC1101_SYNC0 0x05 // Sync word, low uint8_t
#define CC1101_PKTLEN 0x06 // Packet length
#define CC1101_PKTCTRL1 0x07 // Packet automation control
#define CC1101_PKTCTRL0 0x08 // Packet automation control
#define CC1101_ADDR 0x09 // Device address
#define CC1101_CHANNR 0x0A // Channel number
#define CC1101_FSCTRL1 0x0B // Frequency synthesizer control
#define CC1101_FSCTRL0 0x0C // Frequency synthesizer control
#define CC1101_FREQ2 0x0D // Frequency control word, high uint8_t
#define CC1101_FREQ1 0x0E // Frequency control word, middle uint8_t
#define CC1101_FREQ0 0x0F // Frequency control word, low uint8_t
#define CC1101_MDMCFG4 0x10 // Modem configuration
#define CC1101_MDMCFG3 0x11 // Modem configuration
#define CC1101_MDMCFG2 0x12 // Modem configuration
#define CC1101_MDMCFG1 0x13 // Modem configuration
#define CC1101_MDMCFG0 0x14 // Modem configuration
#define CC1101_DEVIATN 0x15 // Modem deviation setting
#define CC1101_MCSM2 0x16 // Main Radio Control State Machine configuration
#define CC1101_MCSM1 0x17 // Main Radio Control State Machine configuration
#define CC1101_MCSM0 0x18 // Main Radio Control State Machine configuration
#define CC1101_FOCCFG 0x19 // Frequency Offset Compensation configuration
#define CC1101_BSCFG 0x1A // Bit Synchronization configuration
#define CC1101_AGCCTRL2 0x1B // AGC control
#define CC1101_AGCCTRL1 0x1C // AGC control
#define CC1101_AGCCTRL0 0x1D // AGC control
#define CC1101_WOREVT1 0x1E // High uint8_t Event 0 timeout
#define CC1101_WOREVT0 0x1F // Low uint8_t Event 0 timeout
#define CC1101_WORCTRL 0x20 // Wake On Radio control
#define CC1101_FREND1 0x21 // Front end RX configuration
#define CC1101_FREND0 0x22 // Front end TX configuration
#define CC1101_FSCAL3 0x23 // Frequency synthesizer calibration
#define CC1101_FSCAL2 0x24 // Frequency synthesizer calibration
#define CC1101_FSCAL1 0x25 // Frequency synthesizer calibration
#define CC1101_FSCAL0 0x26 // Frequency synthesizer calibration
#define CC1101_RCCTRL1 0x27 // RC oscillator configuration
#define CC1101_RCCTRL0 0x28 // RC oscillator configuration
#define CC1101_FSTEST 0x29 // Frequency synthesizer calibration control
#define CC1101_PTEST 0x2A // Production test
#define CC1101_AGCTEST 0x2B // AGC test
#define CC1101_TEST2 0x2C // Various test settings
#define CC1101_TEST1 0x2D // Various test settings
#define CC1101_TEST0 0x2E // Various test settings
// Strobe commands
#define CC1101_SRES 0x30 // Reset chip.
#define CC1101_SFSTXON 0x31 // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
// If in RX/TX: Go to a wait state where only the synthesizer is
// running (for quick RX / TX turnaround).
#define CC1101_SXOFF 0x32 // Turn off crystal oscillator.
#define CC1101_SCAL 0x33 // Calibrate frequency synthesizer and turn it off
// (enables quick start).
#define CC1101_SRX 0x34 // Enable RX. Perform calibration first if coming from IDLE and
// MCSM0.FS_AUTOCAL=1.
#define CC1101_STX 0x35 // In IDLE state: Enable TX. Perform calibration first if
// MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
// Only go to TX if channel is clear.
#define CC1101_SIDLE 0x36 // Exit RX / TX, turn off frequency synthesizer and exit
// Wake-On-Radio mode if applicable.
#define CC1101_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
#define CC1101_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
#define CC1101_SPWD 0x39 // Enter power down mode when CSn goes high.
#define CC1101_SFRX 0x3A // Flush the RX FIFO buffer.
#define CC1101_SFTX 0x3B // Flush the TX FIFO buffer.
#define CC1101_SWORRST 0x3C // Reset real time clock.
#define CC1101_SNOP 0x3D // No operation. May be used to pad strobe commands to two
// uint8_ts for simpler software.
#define CC1101_PARTNUM 0x30
#define CC1101_VERSION 0x31
#define CC1101_FREQEST 0x32
#define CC1101_LQI 0x33
#define CC1101_RSSI 0x34
#define CC1101_MARCSTATE 0x35
#define CC1101_WORTIME1 0x36
#define CC1101_WORTIME0 0x37
#define CC1101_PKTSTATUS 0x38
#define CC1101_VCO_VC_DAC 0x39
#define CC1101_TXBYTES 0x3A
#define CC1101_RXBYTES 0x3B
// RF_SETTINGS is a data structure which contains all relevant CC1101 registers
typedef struct S_RF_SETTINGS
{
uint8_t FSCTRL2; //自已加的
uint8_t FSCTRL1; // Frequency synthesizer control.
uint8_t FSCTRL0; // Frequency synthesizer control.
uint8_t FREQ2; // Frequency control word, high uint8_t.
uint8_t FREQ1; // Frequency control word, middle uint8_t.
uint8_t FREQ0; // Frequency control word, low uint8_t.
uint8_t MDMCFG4; // Modem configuration.
uint8_t MDMCFG3; // Modem configuration.
uint8_t MDMCFG2; // Modem configuration.
uint8_t MDMCFG1; // Modem configuration.
uint8_t MDMCFG0; // Modem configuration.
uint8_t CHANNR; // Channel number.
uint8_t DEVIATN; // Modem deviation setting (when FSK modulation is enabled).
uint8_t FREND1; // Front end RX configuration.
uint8_t FREND0; // Front end RX configuration.
uint8_t MCSM0; // Main Radio Control State Machine configuration.
uint8_t FOCCFG; // Frequency Offset Compensation Configuration.
uint8_t BSCFG; // Bit synchronization Configuration.
uint8_t AGCCTRL2; // AGC control.
uint8_t AGCCTRL1; // AGC control.
uint8_t AGCCTRL0; // AGC control.
uint8_t FSCAL3; // Frequency synthesizer calibration.
uint8_t FSCAL2; // Frequency synthesizer calibration.
uint8_t FSCAL1; // Frequency synthesizer calibration.
uint8_t FSCAL0; // Frequency synthesizer calibration.
uint8_t FSTEST; // Frequency synthesizer calibration control
uint8_t TEST2; // Various test settings.
uint8_t TEST1; // Various test settings.
uint8_t TEST0; // Various test settings.
uint8_t IOCFG2; // GDO2 output pin configuration
uint8_t IOCFG0; // GDO0 output pin configuration
uint8_t PKTCTRL1; // Packet automation control.
uint8_t PKTCTRL0; // Packet automation control.
uint8_t ADDR; // Device address.
uint8_t PKTLEN; // Packet length.
} RF_SETTINGS;
const RF_SETTINGS rfSettings =
{
0x00,
0x08, // FSCTRL1 Frequency synthesizer control.中频计算
0x00, // FSCTRL0 Frequency synthesizer control.频率补偿
0x10, // FREQ2 Frequency control word, high byte. 这3个寄存器决定了基本频率=432.999817
0xA7, // FREQ1 Frequency control word, middle byte.
0x62, // FREQ0 Frequency control word, low byte.
0x00, // CHANNR Channel number. 通道号设置为0,可得出最后的载波频率为=432.999817
0x15, // DEVIATN Modem deviation setting (when FSK modulation is enabled). 调制解调器偏差设置=5.157471
0x56, // FREND1 Front end RX configuration.前端 RX 配置
0x10, // FREND0 Front end RX configuration.前端 TX 配置
0x18, // MCSM0 Main Radio Control State Machine configuration.手动校准频率
0x16, // FOCCFG Frequency Offset Compensation Configuration.频率偏移补偿配置
0x6C, // BSCFG Bit synchronization Configuration.位同步配置
0xC7, // AGCCTRL2 AGC control.自动增益控制
0x00, // AGCCTRL1 AGC control.
0xB2, // AGCCTRL0 AGC control.
0xEA, // FSCAL3 Frequency synthesizer calibration.频率合成器校准
0x2A, // FSCAL2 Frequency synthesizer calibration.
0x00, // FSCAL1 Frequency synthesizer calibration.
0x11, // FSCAL0 Frequency synthesizer calibration.
0x59, // FSTEST Frequency synthesizer calibration.
0x81, // TEST2 Various test settings.
0x35, // TEST1 Various test settings.
0x09, // TEST0 Various test settings.
0x0B, // IOCFG2 GDO2 output pin configuration.
0x06, // IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.