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CCS5.1 下LM3S6911 UCOSII的移植 [复制链接]

移植时需要两个文档,好了直接上代码:
  1. ;********************************************************************************************************
  2. ; uC/OS-II
  3. ; The Real-Time Kernel
  4. ;
  5. ; (c) Copyright 1992-2006, Micrium, Weston, FL
  6. ; All Rights Reserved
  7. ;
  8. ; ARM Cortex-M3 Port
  9. ;
  10. ; File : OS_CPU_A.ASM
  11. ; Version : V2.89

  12. ; By : Jean J. Labrosse
  13. ; Brian Nagel
  14. ;
  15. ; For : ARMv7M Cortex-M3
  16. ; Mode : Thumb2
  17. ; Toolchain : IAR EWARM
  18. ;********************************************************************************************************

  19. ;********************************************************************************************************
  20. ; PUBLIC FUNCTIONS
  21. ;********************************************************************************************************
  22. .global OSRunning ; External references
  23. .global OSPrioCur
  24. .global OSPrioHighRdy
  25. .global OSTCBCur
  26. .global OSTCBHighRdy
  27. .global OSIntExit
  28. .global OSTaskSwHook
  29. .global OS_CPU_ExceptStkBase


  30. .global OS_CPU_SR_Save ; Functions declared in this file
  31. .global OS_CPU_SR_Restore
  32. .global OSStartHighRdy
  33. .global OSCtxSw
  34. .global OSIntCtxSw
  35. .global OS_CPU_PendSVHandler

  36. CPU_OSRunning .field OSRunning, 32
  37. CPU_OSPrioCur .field OSPrioCur, 32
  38. CPU_OSPrioHighRdy .field OSPrioHighRdy, 32
  39. CPU_OSTCBCur .field OSTCBCur, 32
  40. CPU_OSTCBHighRdy .field OSTCBHighRdy, 32
  41. CPU_OSIntExit .field OSIntExit, 32
  42. CPU_OSTaskSwHook .field OSTaskSwHook, 32
  43. CPU_OS_CPU_ExceptStkBase .field OS_CPU_ExceptStkBase, 32

  44. ;********************************************************************************************************
  45. ; EQUATES
  46. ;********************************************************************************************************
  47. NVIC_INT_CTRL .word 0E000ED04h ; Interrupt control state register.
  48. NVIC_SYSPRI14 .word 0E000ED22h ; System priority register (priority 14).
  49. NVIC_PENDSV_PRI .word 0FFh ; PendSV priority value (lowest).
  50. NVIC_PENDSVSET .word 10000000h ; Value to trigger PendSV exception.

  51. ;********************************************************************************************************
  52. ; CODE GENERATION DIRECTIVES
  53. ;********************************************************************************************************

  54. ;RSEG CODE:CODE:NOROOT(2)
  55. ;AREA |.text|, CODE, READONLY, ALIGN=2
  56. .text ; code section
  57. .align 2
  58. .thumb

  59. ;********************************************************************************************************
  60. ; CRITICAL SECTION METHOD 3 FUNCTIONS
  61. ;
  62. ; Description: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
  63. ; would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
  64. ; disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
  65. ; disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
  66. ; into the CPU's status register.
  67. ;
  68. ; Prototypes : OS_CPU_SR OS_CPU_SR_Save(void);
  69. ; void OS_CPU_SR_Restore(OS_CPU_SR cpu_sr);
  70. ;
  71. ;
  72. ; Note(s) : 1) These functions are used in general like this:
  73. ;
  74. ; void Task (void *p_arg)
  75. ; {
  76. ; #if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
  77. ; OS_CPU_SR cpu_sr;
  78. ; #endif
  79. ;
  80. ; :
  81. ; :
  82. ; OS_ENTER_CRITICAL(); /* cpu_sr = OS_CPU_SaveSR(); */
  83. ; :
  84. ; :
  85. ; OS_EXIT_CRITICAL(); /* OS_CPU_RestoreSR(cpu_sr); */
  86. ; :
  87. ; :
  88. ; }
  89. ;********************************************************************************************************

  90. OS_CPU_SR_Save:
  91. MRS R0, PRIMASK ; Set prio int mask to mask all (except faults)
  92. CPSID I
  93. BX LR

  94. OS_CPU_SR_Restore:
  95. MSR PRIMASK, R0
  96. BX LR

  97. ;********************************************************************************************************
  98. ; START MULTITASKING
  99. ; void OSStartHighRdy(void)
  100. ;
  101. ; Note(s) : 1) This function triggers a PendSV exception (essentially, causes a context switch) to cause
  102. ; the first task to start.
  103. ;
  104. ; 2) OSStartHighRdy() MUST:
  105. ; a) Setup PendSV exception priority to lowest;
  106. ; b) Set initial PSP to 0, to tell context switcher this is first run;
  107. ; c) Set the main stack to OS_CPU_ExceptStkBase
  108. ; d) Set OSRunning to TRUE;
  109. ; e) Trigger PendSV exception;
  110. ; f) Enable interrupts (tasks will run with interrupts enabled).
  111. ;********************************************************************************************************

  112. OSStartHighRdy:

  113. LDR R0, NVIC_SYSPRI14 ; Set the PendSV exception priority
  114. LDR R1, NVIC_PENDSV_PRI
  115. STRB R1, [R0]

  116. MOVS R0, #0 ; Set the PSP to 0 for initial context switch call
  117. MSR PSP, R0

  118. LDR R0, CPU_OS_CPU_ExceptStkBase ; Initialize the MSP to the OS_CPU_ExceptStkBase
  119. LDR R1, [R0]
  120. MSR MSP, R1

  121. LDR R0, CPU_OSRunning ; OSRunning = TRUE
  122. MOVS R1, #1
  123. STRB R1, [R0]

  124. LDR R0, NVIC_INT_CTRL ; Trigger the PendSV exception (causes context switch)
  125. LDR R1, NVIC_PENDSVSET
  126. STR R1, [R0]

  127. CPSIE I ; Enable interrupts at processor level

  128. OSStartHang:
  129. B OSStartHang ; Should never get here


  130. ;********************************************************************************************************
  131. ; PERFORM A CONTEXT SWITCH (From task level)
  132. ; void OSCtxSw(void)
  133. ;
  134. ; Note(s) : 1) OSCtxSw() is called when OS wants to perform a task context switch. This function
  135. ; triggers the PendSV exception which is where the real work is done.
  136. ;********************************************************************************************************

  137. OSCtxSw:
  138. LDR R0, NVIC_INT_CTRL ; Trigger the PendSV exception (causes context switch)
  139. LDR R1, NVIC_PENDSVSET
  140. STR R1, [R0]
  141. BX LR

  142. ;********************************************************************************************************
  143. ; PERFORM A CONTEXT SWITCH (From interrupt level)
  144. ; void OSIntCtxSw(void)
  145. ;
  146. ; Notes: 1) OSIntCtxSw() is called by OSIntExit() when it determines a context switch is needed as
  147. ; the result of an interrupt. This function simply triggers a PendSV exception which will
  148. ; be handled when there are no more interrupts active and interrupts are enabled.
  149. ;********************************************************************************************************

  150. OSIntCtxSw:
  151. LDR R0, NVIC_INT_CTRL ; Trigger the PendSV exception (causes context switch)
  152. LDR R1, NVIC_PENDSVSET
  153. STR R1, [R0]
  154. BX LR

  155. ;********************************************************************************************************
  156. ; HANDLE PendSV EXCEPTION
  157. ; void OS_CPU_PendSVHandler(void)
  158. ;
  159. ; Note(s) : 1) PendSV is used to cause a context switch. This is a recommended method for performing
  160. ; context switches with Cortex-M3. This is because the Cortex-M3 auto-saves half of the
  161. ; processor context on any exception, and restores same on return from exception. So only
  162. ; saving of R4-R11 is required and fixing up the stack pointers. Using the PendSV exception
  163. ; this way means that context saving and restoring is identical whether it is initiated from
  164. ; a thread or occurs due to an interrupt or exception.
  165. ;
  166. ; 2) Pseudo-code is:
  167. ; a) Get the process SP, if 0 then skip (goto d) the saving part (first context switch);
  168. ; b) Save remaining regs r4-r11 on process stack;
  169. ; c) Save the process SP in its TCB, OSTCBCur->OSTCBStkPtr = SP;
  170. ; d) Call OSTaskSwHook();
  171. ; e) Get current high priority, OSPrioCur = OSPrioHighRdy;
  172. ; f) Get current ready thread TCB, OSTCBCur = OSTCBHighRdy;
  173. ; g) Get new process SP from TCB, SP = OSTCBHighRdy->OSTCBStkPtr;
  174. ; h) Restore R4-R11 from new process stack;
  175. ; i) Perform exception return which will restore remaining context.
  176. ;
  177. ; 3) On entry into PendSV handler:
  178. ; a) The following have been saved on the process stack (by processor):
  179. ; xPSR, PC, LR, R12, R0-R3
  180. ; b) Processor mode is switched to Handler mode (from Thread mode)
  181. ; c) Stack is Main stack (switched from Process stack)
  182. ; d) OSTCBCur points to the OS_TCB of the task to suspend
  183. ; OSTCBHighRdy points to the OS_TCB of the task to resume
  184. ;
  185. ; 4) Since PendSV is set to lowest priority in the system (by OSStartHighRdy() above), we
  186. ; know that it will only be run when no other exception or interrupt is active, and
  187. ; therefore safe to assume that context being switched out was using the process stack (PSP).
  188. ;********************************************************************************************************

  189. OS_CPU_PendSVHandler:
  190. CPSID I ; Prevent interruption during context switch
  191. MRS R0, PSP ; PSP is process stack pointer
  192. CBZ R0, OS_CPU_PendSVHandler_nosave ; Skip register save the first time

  193. SUBS R0, R0, #0x20 ; Save remaining regs r4-11 on process stack
  194. STM R0, {R4-R11}

  195. LDR R1, CPU_OSTCBCur ; OSTCBCur->OSTCBStkPtr = SP;
  196. LDR R1, [R1]
  197. STR R0, [R1] ; R0 is SP of process being switched out

  198. ; At this point, entire context of process has been saved
  199. OS_CPU_PendSVHandler_nosave:
  200. PUSH {R14} ; Save LR exc_return value
  201. LDR R0, CPU_OSTaskSwHook ; OSTaskSwHook();
  202. BLX R0
  203. POP {R14}

  204. LDR R0, CPU_OSPrioCur ; OSPrioCur = OSPrioHighRdy;
  205. LDR R1, CPU_OSPrioHighRdy
  206. LDRB R2, [R1]
  207. STRB R2, [R0]

  208. LDR R0, CPU_OSTCBCur ; OSTCBCur = OSTCBHighRdy;
  209. LDR R1, CPU_OSTCBHighRdy
  210. LDR R2, [R1]
  211. STR R2, [R0]

  212. LDR R0, [R2] ; R0 is new process SP; SP = OSTCBHighRdy->OSTCBStkPtr;
  213. LDM R0, {R4-R11} ; Restore r4-11 from new process stack
  214. ADDS R0, R0, #0x20
  215. MSR PSP, R0 ; Load PSP with new process SP
  216. ORR LR, LR, #0x04 ; Ensure exception return uses process stack
  217. CPSIE I
  218. BX LR ; Exception return will restore remaining context
  219. .end
复制代码
ARM optimizing c complier.pdf (885.36 KB, 下载次数: 14)

ARM Asm Tool.pdf (1.82 MB, 下载次数: 20)

[ 本帖最后由 zw357234798 于 2012-9-6 19:32 编辑 ]

os_cpu_a.asm

12.69 KB, 下载次数: 14

 
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