verilog 冒泡排序

a3261735

verilog 冒泡排序 [复制链接]

    module maopao_sort(
                  input         strobe,
                  input         reset_n,
                  input [7:0]   data_in,
                  input         lval,
                  output  [7:0] data_out,
                  output        sort_finish_en
                  );

   parameter ARRAY_MAX_INDEX = 8;

   reg [17:0] cnt;
   always @(posedge strobe)
             if(lval)
                 cnt <= cnt +18'd1;
             else
                cnt <= 18'd0;

    reg   [7:0] data_in_d1;
    reg         lval_d1;
    reg         lval_d2;
    reg [17:0]  cnt_d1;
    always @(posedge strobe)
              begin
                  lval_d1 <= lval;
                  data_in_d1 <= data_in;
                  lval_d2 <= lval_d1;
                  cnt_d1 <= cnt;
              end

    reg [7:0] med_data;
    always @(posedge strobe)
              if(lval_d1)
                  begin
                      if(cnt == 18'd1)
                          med_data <= data_in_d1;
                      else if(med_data >data_in_d1)
                               med_data <= data_in_d1;
                      else
                         med_data <= med_data;
                  end
              else
                 med_data <= med_data;

    assign data_out =(lval_d2 && cnt_d1 == ARRAY_MAX_INDEX)?med_data:8'd0;
    assign sort_finish_en = (lval_d2 && cnt_d1 == ARRAY_MAX_INDEX)?1'b1:1'b0;
  
    endmodule
                        

                      

eeleader

赞一个!

Yehhon

呵呵    本人正开始学Verilog   学习中～～

似水如烟

只干巴巴传个代码，能看懂的都是神了。哥们，下次捎带点解释啊