我使用的是ST7FLITE05YOM6的芯片,在使用LITE定时器的过程中,出现问题。源程序代码如下,主要实现的功能是一秒钟延时。请问一下各位这个源代码为什么不能够运行,谢谢! st7/ ;------------------------------------------------------ ; SEGMENT MAPPING FILE AUTOMATICALLY GENERATED BY STVD7 ; SHOULD NOT BE MANUALLY MODIFIED. ; CHANGES WILL BE LOST WHEN FILE IS REGENERATED. ;------------------------------------------------------ TITLE "KF85.ASM" MOTOROLA #INCLUDE "st7flite05.inc"
BYTES ; The following addresses are 8 bits long segment byte at 80-FF 'ram0' MMSH DS.B $1 MMSL DS.B $1
WORDS ; The following addresses are 16 bits long segment byte at FA00-FFDF 'rom' MAIN: LD A,#0 LD PBDDR,A LD PBOR,A LD A,#$0F LD PADDR,A LD PAOR,A CLR PBDR CLR PADR BSET PADR,#3 BSET PADR,#2 LD A,#0 LD MMSH,A LD MMSL,A LD A,2 LOOP: NOP NOP NOP NOP NOP NOP DEC A JRNE LOOP BRES PADR,#3 NOP NOP NOP NOP BRES PADR,#2 ;JP MAIN LD A,#$10 LD LTCSR,A RIM LOOP1 HALT
st7/ ;------------------------------------------------------ ; SEGMENT MAPPING FILE AUTOMATICALLY GENERATED BY STVD7 ; SHOULD NOT BE MANUALLY MODIFIED. ; CHANGES WILL BE LOST WHEN FILE IS REGENERATED. ;------------------------------------------------------ TITLE "KF85.ASM" MOTOROLA #INCLUDE "st7flite05.inc"
BYTES ; The following addresses are 8 bits long segment byte at 80-FF 'ram0' MMSH DS.B $1 MMSL DS.B $1
WORDS ; The following addresses are 16 bits long segment byte at FA00-FFDF 'rom' MAIN: LD A,#0 LD PBDDR,A LD PBOR,A LD A,#$0F LD PADDR,A LD PAOR,A CLR PADR CLR PBDR BSET PADR,#2 ;BRES PADR,#2 LD A,#0 LD MMSH,A LD MMSL,A LD A,#$10 LD LTCSR,A LD Y,#255 ;BRES PADR,#3 RIM JRA * TBINT: