// Configuring the System Control Space (SCS) registers
typedef volatile struct { int MasterCtrl; int IntCtrlType; int zReserved008_00c[2]; /* Reserved space */ struct { int Ctrl; int Reload; int Value; int Calibration; } SysTick; int zReserved020_0fc[(0x100-0x20)/4]; /* Reserved space */ /* Offset 0x0100 */ struct { int Enable[32]; int Disable[32]; int Set[32]; int Clear[32]; int Active[64]; int Priority[64]; } NVIC; int zReserved0x500_0xcfc[(0xd00-0x500)/4]; /* Reserved space */ /* Offset 0x0d00 */ int CPUID; int IRQcontrolState; int ExceptionTableOffset; int AIRC; int SysCtrl; int ConfigCtrl; int SystemPriority[3]; int SystemHandlerCtrlAndState; int ConfigurableFaultStatus; int HardFaultStatus; int DebugFaultStatus; int MemManageAddress; int BusFaultAddress; int AuxFaultStatus; int zReserved0xd40_0xd90[(0xd90-0xd40)/4]; /* Reserved space */ /* Offset 0x0d90 */ struct { int Type; int Ctrl; int RegionNumber; int RegionBaseAddr; int RegionAttrSize; } MPU; } SCS_t;
Table 8-15 Vector Table Offset Register bit assignments Field Name Definition [31:30] - Reserved [29] TBLBASE Table Base is in Code (0) or RAM (1) [28:7] TBLOFF Vector table base offset field. Contains the offset of the table base from the bottom of the SRAM or CODE space. [6:0] - Reserved.
在 void NVIC_Configuration(void) 有如下语句:
#ifdef VECT_TAB_RAM /* Set the Vector Table base location at 0x20000000 */ NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); #else /* VECT_TAB_FLASH */ /* Set the Vector Table base location at 0x08000000 */ NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); #endif
//------------------------------------------------------------------------ // 向量表偏移量寄存器(VTOR) 0xE000_ED08 //------------------------------------------------------------------------ struct SCB_ExceptionTableOffset_BITS { Uint32 Reserved :15; // 6:0 Uint32 TBLOFF :1; // 28:7 Vector table base offset field. Contains the offset of the table base from the bottom of the SRAMor CODE space. Uint32 TBLBASE :1; // 29 向量表是在Code 区(0),还是在RAM 区(1)TBLBASE Table Base is in Code (0) or RAM (1) Uint32 Reserved0 :2; // 31:30 };
union SCB_ExceptionTableOffset_REG { Uint32 all; struct SCB_ExceptionTableOffset_BITS bit;