EDK测试程序无法通过

eeleader-mcu

EDK测试程序无法通过 [复制链接]

这是system.mhs文件，但是测试程序无法通过，想请教是哪里有问题。
# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 10.1 Build EDK_K.15
# Tue Jul 13 09:44:51 2010
# Target Board:  Custom
# Family:    spartan3e
# Device:    xc3s1600e
# Package:   fg400
# Speed Grade:  -4
# Processor: microblaze_0
# System clock frequency: 50.00 MHz
# On Chip Memory :  32 KB
# Total Off Chip Memory :   4 MB
# - Generic_External_Memory =   4 MB
# ##############################################################################
PARAMETER VERSION = 2.1.0


PORT fpga_0_RS232_RX_pin = fpga_0_RS232_RX, DIR = I
PORT fpga_0_RS232_TX_pin = fpga_0_RS232_TX, DIR = O
PORT fpga_0_Generic_External_Memory_Mem_DQ_pin = fpga_0_Generic_External_Memory_Mem_DQ, DIR = IO, VEC = [0:7]
PORT fpga_0_Generic_External_Memory_Mem_A_pin = fpga_0_Generic_External_Memory_Mem_A, DIR = O, VEC = [0:31]
PORT fpga_0_Generic_External_Memory_Mem_BEN_pin = net_gnd, DIR = O
PORT fpga_0_Generic_External_Memory_Mem_WEN_pin = fpga_0_Generic_External_Memory_Mem_WEN, DIR = O
PORT fpga_0_Generic_External_Memory_Mem_OEN_pin = fpga_0_Generic_External_Memory_Mem_OEN, DIR = O, VEC = [0:0]
PORT fpga_0_Generic_External_Memory_Mem_CEN_pin = fpga_0_Generic_External_Memory_Mem_CEN, DIR = O, VEC = [0:0]
PORT fpga_0_Generic_External_Memory_flash_csn_dummy_pin = net_vcc, DIR = O
PORT fpga_0_Generic_External_Memory_Mem_RPN_pin = fpga_0_Generic_External_Memory_Mem_RPN, DIR = O
PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = CLK, CLK_FREQ = 50000000
PORT sys_rst_pin = sys_rst_s, DIR = I, RST_POLARITY = 1, SIGIS = RST


# PORT Interrupt_pin = Interrupt, DIR = I, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH
BEGIN microblaze
PARAMETER INSTANCE = microblaze_0
PARAMETER HW_VER = 7.10.a
PARAMETER C_NUMBER_OF_PC_BRK = 2
PARAMETER C_FAMILY = spartan3e
PARAMETER C_INSTANCE = microblaze_0
PARAMETER C_DEBUG_ENABLED = 1
PARAMETER C_ALLOW_ICACHE_WR = 0
PARAMETER C_ALLOW_DCACHE_WR = 0
BUS_INTERFACE DPLB = mb_plb
BUS_INTERFACE IPLB = mb_plb
BUS_INTERFACE DEBUG = microblaze_0_dbg
BUS_INTERFACE DLMB = dlmb
BUS_INTERFACE ILMB = ilmb
# #PORT MB_RESET = mb_reset
PORT DBG_CAPTURE = Dbg_Capture
PORT DBG_CLK = Dbg_Clk
PORT DBG_REG_EN = Dbg_Reg_En
PORT DBG_TDI = Dbg_TDI
PORT DBG_TDO = Dbg_TDO
PORT DBG_UPDATE = Dbg_Update
PORT MB_RESET = sys_rst_s
PORT DEBUG_RST = Debug_SYS_Rst
PORT RESET = sys_rst_s
PORT Interrupt = Interrupt
END

# #PORT DEBUG_RST = Debug_Rst
BEGIN plb_v46
PARAMETER INSTANCE = mb_plb
PARAMETER HW_VER = 1.02.a
PORT PLB_Clk = sys_clk_s
PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_v10
PARAMETER INSTANCE = ilmb
PARAMETER HW_VER = 1.00.a
PORT LMB_Clk = sys_clk_s
PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_v10
PARAMETER INSTANCE = dlmb
PARAMETER HW_VER = 1.00.a
PORT LMB_Clk = sys_clk_s
PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = dlmb_cntlr
PARAMETER HW_VER = 2.10.a
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x00003fff
BUS_INTERFACE SLMB = dlmb
BUS_INTERFACE BRAM_PORT = dlmb_port
PORT LMB_Rst = sys_periph_reset
END

BEGIN lmb_bram_if_cntlr
PARAMETER INSTANCE = ilmb_cntlr
PARAMETER HW_VER = 2.10.a
PARAMETER C_BASEADDR = 0x00000000
PARAMETER C_HIGHADDR = 0x00003fff
BUS_INTERFACE SLMB = ilmb
BUS_INTERFACE BRAM_PORT = ilmb_port
PORT LMB_Rst = sys_periph_reset
END

BEGIN bram_block
PARAMETER INSTANCE = lmb_bram
PARAMETER HW_VER = 1.00.a
BUS_INTERFACE PORTA = ilmb_port
BUS_INTERFACE PORTB = dlmb_port
PORT BRAM_Rst_B = sys_periph_reset
PORT BRAM_Rst_A = sys_periph_reset
END

BEGIN xps_mch_emc
PARAMETER INSTANCE = Generic_External_Memory
PARAMETER HW_VER = 1.00.a
PARAMETER C_MAX_MEM_WIDTH = 8
PARAMETER C_MEM0_WIDTH = 8
PARAMETER C_MCH_PLB_CLK_PERIOD_PS = 20000
PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 1
PARAMETER C_TCEDV_PS_MEM_0 = 90000
PARAMETER C_TWC_PS_MEM_0 = 90000
PARAMETER C_TAVDV_PS_MEM_0 = 90000
PARAMETER C_TWP_PS_MEM_0 = 35000
PARAMETER C_THZCE_PS_MEM_0 = 20000
PARAMETER C_THZOE_PS_MEM_0 = 20000
PARAMETER C_MEM0_BASEADDR = 0x81c00000
PARAMETER C_MEM0_HIGHADDR = 0x81ffffff
BUS_INTERFACE SPLB = mb_plb
PORT Mem_DQ = fpga_0_Generic_External_Memory_Mem_DQ
PORT Mem_A = fpga_0_Generic_External_Memory_Mem_A
# #PORT Mem_BEN = fpga_0_Generic_External_Memory_Mem_BEN
PORT Mem_WEN = fpga_0_Generic_External_Memory_Mem_WEN
PORT Mem_OEN = fpga_0_Generic_External_Memory_Mem_OEN
PORT Mem_CEN = fpga_0_Generic_External_Memory_Mem_CEN
PORT Mem_RPN = fpga_0_Generic_External_Memory_Mem_RPN
PORT MCH_PLB_Rst = sys_periph_reset
PORT MCH_PLB_Clk = sys_clk_s
END

BEGIN xps_uartlite
PARAMETER INSTANCE = RS232
PARAMETER HW_VER = 1.00.a
PARAMETER C_BAUDRATE = 115200
PARAMETER C_USE_PARITY = 0
PARAMETER C_SPLB_CLK_FREQ_HZ = 50000000
PARAMETER C_BASEADDR = 0x84000000
PARAMETER C_HIGHADDR = 0x8400ffff
BUS_INTERFACE SPLB = mb_plb
PORT RX = fpga_0_RS232_RX
PORT TX = fpga_0_RS232_TX
PORT Interrupt = RS232_Interrupt
PORT SPLB_Rst = sys_periph_reset
END

BEGIN xps_bram_if_cntlr
PARAMETER INSTANCE = xps_bram_if_cntlr_1
PARAMETER HW_VER = 1.00.a
PARAMETER C_SPLB_NATIVE_DWIDTH = 32
PARAMETER C_BASEADDR = 0x81a08000
PARAMETER C_HIGHADDR = 0x81a0bfff
BUS_INTERFACE SPLB = mb_plb
PORT SPLB_Rst = sys_periph_reset
END

BEGIN clock_generator
PARAMETER INSTANCE = clock_generator_0
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 1
PARAMETER C_CLKIN_FREQ = 50000000
PARAMETER C_CLKOUT0_FREQ = 50000000
PARAMETER C_CLKOUT0_BUF = TRUE
PARAMETER C_CLKOUT0_PHASE = 0
PARAMETER C_CLKOUT0_GROUP = NONE
PORT CLKOUT0 = sys_clk_s
PORT CLKIN = dcm_clk_s
PORT LOCKED = Dcm_all_locked
PORT RST = net_gnd
END

BEGIN mdm
PARAMETER INSTANCE = debug_module
PARAMETER HW_VER = 1.00.b
PARAMETER C_BASEADDR = 0x84400000
PARAMETER C_HIGHADDR = 0x8440ffff
BUS_INTERFACE MBDEBUG_0 = microblaze_0_dbg
BUS_INTERFACE SPLB = mb_plb
PORT Debug_SYS_Rst = Debug_SYS_Rst
PORT Dbg_Capture_0 = Dbg_Capture
PORT Dbg_Clk_0 = Dbg_Clk
PORT Dbg_Reg_En_0 = Dbg_Reg_En
PORT Dbg_TDI_0 = Dbg_TDI
PORT Dbg_TDO_0 = Dbg_TDO
PORT Dbg_Update_0 = Dbg_Update
PORT OPB_Rst = sys_periph_reset
PORT OPB_Clk = sys_clk_s
PORT SPLB_Rst = sys_periph_reset
END

BEGIN proc_sys_reset
PARAMETER INSTANCE = proc_sys_reset_0
PARAMETER HW_VER = 2.00.a
PARAMETER C_AUX_RESET_HIGH = 0
PORT Slowest_sync_clk = sys_clk_s
PORT Dcm_locked = Dcm_all_locked
PORT Ext_Reset_In = sys_rst_s
PORT MB_Reset = net_vcc
PORT Bus_Struct_Reset = sys_bus_reset
PORT MB_Debug_Sys_Rst = net_vcc
PORT Peripheral_Reset = sys_periph_reset
PORT Aux_Reset_In = net_gnd
END

BEGIN xps_intc
PARAMETER INSTANCE = xps_intc_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_BASEADDR = 0x81800000
PARAMETER C_HIGHADDR = 0x8180ffff
BUS_INTERFACE SPLB = mb_plb
PORT Irq = Interrupt
PORT Intr = RS232_Interrupt
PORT SPLB_Rst = sys_periph_reset
END

eeleader

我没看出问题所在！！！！！！！！！！！！！！

 

等待高手出现！！！！！！！！1！11！！！！！！