while(pReg[I2C_STAT] != 0x8);
pReg[I2C_DAT] = 0xA0; //set SLA+W:1010000+0
pReg[I2C_CONCLR] = (I2CONCLR_SIC|I2CONCLR_STAC); //clear SI bit to transmit SLA+W
while(pReg[I2C_STAT] != 0x18);
pReg[I2C_DAT] = highaddress; //write address to eeprom
pReg[I2C_CONCLR] = I2CONCLR_SIC; //clear SI bit to transmit address
while(pReg[I2C_STAT] != 0x28);
pReg[I2C_DAT] = lowaddress; //write address to eeprom
pReg[I2C_CONCLR] = I2CONCLR_SIC; //clear SI bit to transmit address
while(pReg[I2C_STAT] != 0x28); //stat must be 0x28
pReg[I2C_DAT] = data; //write data to eeprom
pReg[I2C_CONCLR] = I2CONCLR_SIC; //clear SI bit to transmit data
//PRO_Ticker_DelayMs(1,1); //wait to send data to eeprom
while(pReg[I2C_STAT] != 0x28); //stat must be 0x28
pReg[I2C_CONCLR] = I2CONCLR_SIC;
pReg[I2C_CONSET] = I2CONSET_STO; //set STO bit to stop transmit
while(pReg[I2C_STAT] != 0x8);//state word must be 0x8
pReg[I2C_DAT] = 0xA0;//set SLA+W
pReg[I2C_CONCLR] = 0x8|0x20;//clear SI bit to transmit SLA+W
while(pReg[I2C_STAT] != 0x18);//state word must be 0x18
pReg[I2C_DAT] = highaddress;//eeprom read address
pReg[I2C_CONCLR] = I2CONCLR_SIC;//clear SI bit to transmit address
while(pReg[I2C_STAT] != 0x28);//state word must be 0x18
pReg[I2C_DAT] = lowaddress;//eeprom read address
pReg[I2C_CONCLR] = I2CONCLR_SIC;//clear SI bit to transmit address
while(pReg[I2C_STAT] != 0x28);//state word must be 0x28
pReg[I2C_CONSET] = I2CONSET_STO;//stop dummy write
pReg[I2C_CONCLR] = I2CONCLR_SIC;//clear SI bit
pReg[I2C_CONSET] = I2CONSET_STA;//send another start condition
while(pReg[I2C_STAT] != 0x8);
pReg[I2C_DAT] = 0xA1;//send read order:1010000+1
pReg[I2C_CONCLR] = (I2CONCLR_SIC|I2CONCLR_STAC);//clear SI bit to transmit read order
while(pReg[I2C_STAT] != 0x40);//state word 0x40
pReg[I2C_CONCLR] = I2CONCLR_SIC;//clear SI bit,read eeprom
while(pReg[I2C_STAT] != 0x58);//received a data word,no ACK
data = (unsigned char)pReg[I2C_DAT];//read data
pReg[I2C_CONCLR] = (I2CONCLR_SIC|I2CONCLR_AAC);
pReg[I2C_CONSET] = I2CONSET_STO;//set STO bit to stop transmit
return data;
}