应该是在xlli_lowlev_init.s中的这个函数下吧?
xlli_clks_init FUNCTION
; Turn Off ALL on-chip peripheral clocks for re-configuration
;
ldr r4, =xlli_CLKREGS_PHYSICAL_BASE; Load clock registers base address
ldr r1, =0x400000 ; Forces memory clock to stay ON!!
ldr r2, =xlli_CKEN_value ; Get any other bits required from the include file
orr r1, r1, r2 ; OR everything together
str r1, [r4, #xlli_CKEN_offset] ; ... and write out to the clock enable register
;
; Set Crystal: Memory Freq, Memory:RunMode Freq, RunMode, TurboMode Freq Multipliers,
; set RunMode & TurboMode to default frequency.
;
ldr r2, =xlli_CCCR_value ; Get CORE_CLK_DEFAULT value
str r2, [r4, #xlli_CCCR_offset] ; Write to the clock config register
;
; Enable the 32 KHz oscillator and set the 32KHz output enable bits
;
mov r1, #(xlli_OSCC_OON :OR: xlli_OSCC_TOUT_EN)
str r1, [r4, #xlli_OSCC_offset] ; for RTC and Power Manager
;
; Init Real Time Clock (RTC) registers
;
ldr r4, =xlli_RTCREGS_PHYSICAL_BASE ; Load RTC registers base address
mov r2, #0 ; Clear a work register
str r2, [r4, #xlli_RTSR_offset] ; Clear RTC Status register
str r2, [r4, #xlli_RCNR_offset] ; Clear RTC Counter Register
str r2, [r4, #xlli_RTAR_offset] ; Clear RTC Alarm Register
str r2, [r4, #xlli_SWCR_offset] ; Clear Stopwatch Counter Register
str r2, [r4, #xlli_SWAR1_offset] ; Clear Stopwatch Alarm Register 1
str r2, [r4, #xlli_SWAR2_offset] ; Clear Stopwatch Alarm Register 2
str r2, [r4, #xlli_PICR_offset] ; Clear Periodic Counter Register
str r2, [r4, #xlli_PIAR_offset] ; Clear Interrupt Alarm Register
;
; Check the Oscillator OK (OOK) bit in clock register OSCC to insure the timekeeping oscillator
; is enabled and stable before returning to the calling program.
;
xlli_6
ldr r1, [r4, #xlli_OSCC_offset] ; Get the status of the OSCC register
ands r1, r1, #xlli_OSCC_OOK ; is the oscillator OK bit set?
beq xlli_6 ; Spin in this loop until the bit is set
ldr r4, =xlli_CLKREGS_PHYSICAL_BASE; Load clock registers base address 这个CCCR的物理基地址 = 0x4130_0000
ldr r1, =0x400000 ; Forces memory clock to stay ON!!
ldr r2, =xlli_CKEN_value ; Get any other bits required from the include file r2 = 0x0040_02c0
orr r1, r1, r2 ; OR everything together OR之后r1 = 0x0040_02c0
str r1, [r4, #xlli_CKEN_offset] ; ... and write out to the clock enable register
; xlli_CKEN_offset = 0x04 这个操作之后使对应的CLK to the unit enable
; Set Crystal: Memory Freq, Memory:RunMode Freq, RunMode, TurboMode Freq Multipliers,
; set RunMode & TurboMode to default frequency.
;
ldr r2, =xlli_CCCR_value ; Get CORE_CLK_DEFAULT value r2 = 0x0000_0107
str r2, [r4, #xlli_CCCR_offset] ; Write to the clock config register xlli_CCCR_offset = 0x0
这个操作使L=7,N=1
datasheet中:
10:7 R/W 2N Turbo-Mode-to-Run-Mode Ratio, N
(Reset value 0b010 for N = 1)
0b000–0b010 = ratio (N) = 1
0b011–0b110 = ratio (N) = (2N / 2)
0b111 = reserved
6:5 — — reserved
4:0 R/W L Run-Mode-to-Oscillator Ratio
(Reset value 0b00111 for L=7)
0b00000–0b00010 = ratio = 2
0b00011–0b11110 = ratio = L
0b11111 = reserved
当L=7,N=1时:
Turbo-mode frequency (T) = 13-MHz processor-oscillator frequency * L * N
Run-mode frequency (R) = 13-MHz processor-oscillator frequency * L
System-bus frequency = 13-MHz processor-oscillator frequency * L / B,
where B = 1 (when in fast-bus mode) or B = 2 (when not in fast-bus mode)
For CCCR[A] = 0
Memory-controller frequency = 13-MHz processor-oscillator frequency * L / M,
where M = 1 (L = 2-10), M = 2 (L = 11-20), or M = 4 (L = 21-31)
LCD frequency = 13-MHz processor-oscillator frequency * L / K,
where K = 1 (L = 2-7), K = 2 (L = 8-16), or K = 4 (L = 17-31)
For CLKCFG[B] = 0 and CCCR[A] = 1 (see Table 3-7):
Memory-controller frequency = 13-MHz processor-oscillator frequency * L / 2
LCD frequency = 13-MHz processor-oscillator frequency * L / K,
where K = 1 (L = 2-7), K = 2 (L = 8-16), or K = 4 (L = 17-31)
For CLKCFG[B] = 1 and CCCR[A] = 1 (see Table 3-7):
Memory-controller frequency = 13-MHz processor-oscillator frequency * L
LCD frequency = 13-MHz processor-oscillator frequency * L / K,
where K = 1 (L = 2-7), K = 2 (L = 8-16), or K = 4 (L = 17-31)
可是我怎么凑也凑不到400多MHZ的主频啊???