C2000 ePWM模块

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C2000 ePWM模块 [复制链接]

以TMS320F28030为例，其它型号可能有差异，不过大同小异。

在TI C2000 DSP中，PWM模块是一个独立的模块，并没有算作通用定时器的一部分，这也充分体现了C2000系列用于控制系统的定位。整个ePWM模块可以视为由若干个独立的ePWM子模块组成，每个ePWM子模块对应2个互补输出的通道——EPWMxA及EPWMxB。这样的设计减少了各PWM通道间的耦合关系，使用起来更为方便灵活。

在TI的参考手册中是这样说的：

Cross coupling or sharing of resources has been avoided; instead, the ePWM is built up from smaller single channel modules with separate resources that can operate together as required to form a system. This modular approach results in an orthogonal architecture and provides a more transparent view of the peripheral structure, helping users to understand its operation quickly.

各独立的ePWM模块可以单独工作，也可以通过时钟同步策略来连接为一个整体，除此之外，时钟同步还可用于同步ePWM模块与eCAP模块。下文所说的ePWM模块都是指每个独立的子模块。

概述

ePWM模块的简要结构框图如下：

• 输出信号：

** EPWMxA & EPWMxB ：**
PWM信号输出。

** EPWMxTZINT & EPWMxINT ：**
中断信号输出，连接至PIE模块。

** EPWMxSOCA & EPWMxSOCB ：**
ADC SOC信号输出，用于控制ADC开始进行数据转换的时间。

Each ePWM module has two ADC start of conversion signals . Any ePWM module can trigger a start of conversion . Which event triggers the start of conversion is configured in the Event-Trigger submodule of the ePWM.

• 输入信号：

** TZ1 ~ TZ6 ：**
错误信号输入，ePWM模块内部可以选择性的处理这些错误信号，具体含义：

These input signals alert the ePWM module of fault conditions external to the ePWM module. *Each module on a device can be configured to either use or ignore any of the trip-zone signals. The TZ1 to TZ3 trip-zone signals can be configured as asynchronous inputs through the GPIO peripheral. TZ4 is connected to an inverted EQEP1 error signal (EQEP1ERR) from the EQEP1 module (for those devices with an EQEP1 module). TZ5 is connected to the system clock fail logic, and TZ6 is connected to the EMUSTOP output from the CPU. *This allows you to configure a trip action when the clock fails or the CPU halts.

** COMPxOUT ：**
比较器模块的输出信号。

• 时钟同步信号：

** EPWMxSYNCI & EPWMxSYNCO ：**
菊花链结构的时钟同步信号，EPWMxSYNCI是输入，EPWMxSYNCO是输出.

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各模块的连接关系见下图：