Jlink烧录外部flash的时候提示错误信息
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本帖最后由 小小料豆 于 2019-12-30 10:58 编辑
我在用jlin烧录外部flash的时候经常会出现如下提示,烧录fail。但是再重新烧录一次就会Ok。求大神帮忙看一下。
烧录脚本:
h
rx 2
h
loadfile 1111111111.hex
rx 10
g
exit
烧录log:
SEGGER J-Link Commander V6.34g (Compiled Sep 26 2018 14:45:38)
DLL version V6.34g, compiled Sep 26 2018 14:45:08
J-Link Command File read successfully.
Processing script file...
J-Link connection not established yet but required for command.
Connecting to J-Link via USB...O.K.
Firmware: J-Link V10 compiled Sep 4 2018 11:24:21
Hardware version: V10.10
S/N: 50129486
License(s): GDB
VTref=1.913V
Target connection not established yet but required for command.
Device "CY8C6XX7_CM0P" selected.
Connecting to target via SWD
********************************************
InitTarget for PSoC6 Cortex-M0+ script
********************************************
********************************************
InitTarget for PSoC6 Cortex-M0+ script
********************************************
Found SW-DP with ID 0x6BA02477
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[1]: AHB-AP (IDR: Not set)
AP[2]: AHB-AP (IDR: Not set)
AP[1]: Core found
AP[1]: AHB-AP ROM base: 0xF0000000
CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
Found Cortex-M0 r0p1, Little endian.
FPUnit: 4 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ F0000000
ROMTbl[0][0]: E00FF000, CID: B105100D, PID: 000BB4C0 ROM Table
ROMTbl[1] @ E00FF000
ROMTbl[1][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS
ROMTbl[1][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT
ROMTbl[1][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB
ROMTbl[0][1]: F0002000, CID: B105900D, PID: 000BB9A6 ???
ROMTbl[0][2]: F0003000, CID: B105900D, PID: 001BB932 MTB-M0+
Cortex-M0 identified.
PC = 08000370, CycleCnt = 00000000
R0 = 00000024, R1 = 00000000, R2 = E000ED00, R3 = 08001480
R4 = 1002B03C, R5 = 00000001, R6 = 08001500, R7 = 08002DB8
R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
R12= 10011ABD
SP(R13)= 08002D60, MSP= 08002D60, PSP= 3844A000, R14(LR) = 080002BB
XPSR = 21000000: APSR = nzCvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000001, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 01
FPU regs: FPU not enabled / not implemented on connected CPU.
Reset delay: 10 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
PC = 00000F00, CycleCnt = 00000000
R0 = 00000000, R1 = 00000300, R2 = 05FA0000, R3 = 40210000
R4 = 16007C00, R5 = 00000D04, R6 = 16000200, R7 = 16000203
R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000
R12= 000000CA
SP(R13)= 08047800, MSP= 08047800, PSP= 3844A000, R14(LR) = 16002BAF
XPSR = 61000000: APSR = nZCvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
FPU regs: FPU not enabled / not implemented on connected CPU.
Downloading file [1111111111.hex]...
****** Error: PC of target system has unexpected value after erasing sector. (PC = 0x00000000)!
---------------------------------------------------------------------- Registers -------------------------------------------------------------------------------------
PC = 00000000
Current: R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000
R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Can not read register 15 (R15) while CPU is runningCan not read register 7 (R7) while CPU is runningCan not read register 6 (R6) while CPU is runningCan not read register 5 (R5) while CPU is runningCan not read register 4 (R4) while CPU is runningCan not read register 3 (R3) while CPU is runningCan not read register 2 (R2) while CPU is runningCan not read register 1 (R1) while CPU is runningCan not read register 0 (R0) while CP
Unspecified error -1
Reset delay: 5 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: SYSRESETREQ has confused core.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
**************************
WARNING: CPU could not be halted
**************************
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
**************************
WARNING: CPU could not be halted
**************************
Reset: Failed. Toggling reset pin and trying reset strategy again.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: SYSRESETREQ has confused core.
Reset: Using fallback: Reset pin.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
**************************
WARNING: CPU could not be halted
**************************
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via reset pin
Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
Reset: Reconnecting and manually halting CPU.
**************************
WARNING: CPU could not be halted
**************************
****** Error: DAP error while reading DP-Ctrl-Stat register.
****** Error: CPU is not halted
Script processing completed.
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