ShockBurst™
ShockBurst™ makes it possible to use the high data rate offered by nRF24L01
without the need of a costly, high-speed microcontroller (MCU) for data
processing/clock recovery. By placing all high speed signal processing related to RF
protocol on-chip, nRF24L01 offers the application microcontroller a simple SPI
compatible interface, the data rate is decided by the interface-speed the micro
controller itself sets up. By allowing the digital part of the application to run at low
speed, while maximizing the data rate on the RF link, ShockBurst™ reduces the
average current consumption in applications.
In ShockBurst™ RX, IRQ notifies the MCU when a valid address and payload is
received respectively. The MCU can then clock out the received payload from an
nRF24L01 RX FIFO.
In ShockBurst™ TX, nRF24L01 automatically generates preamble and CRC, see
Table 12. IRQ notifies the MCU that the transmission is completed. All together, this
means reduced memory demand in the MCU resulting in a low cost MCU, as well as
reduced software development time. nRF24L01 has a three level deep RX FIFO
(shared between 6 pipes) and a three level deep TX FIFO. The MCU can access the
FIFOs at any time, in power down mode, in standby modes, and during RF packet
transmission. This allows the slowest possible SPI interface compared to the average
datarate, and may enable usage of an MCU without hardware SPI.