关于sppc中的warning

zhao_q

关于sppc中的warning [复制链接]

Warning (12020): Port "address_b" on the entity instantiation of "cpu_traceram_lpm_dram_bdp_component" is connected to a signal of width 17. The formal width of the signal in the module is 7.  Extra bits will be ignored.
Warning (12020): Port "jdo" on the entity instantiation of "the_cpu_nios2_oci_itrace" is connected to a signal of width 38. The formal width of the signal in the module is 16.  Extra bits will be ignored.
Warning (12020): Port "dbrk" on the entity instantiation of "cpu_nios2_oci_dbrk_hit3_match_single" is connected to a signal of width 78. The formal width of the signal in the module is 71.  Extra bits will be ignored.
Warning (12020): Port "dbrk" on the entity instantiation of "cpu_nios2_oci_dbrk_hit2_match_single" is connected to a signal of width 78. The formal width of the signal in the module is 71.  Extra bits will be ignored.
Warning (12020): Port "dbrka" on the entity instantiation of "cpu_nios2_oci_dbrk_hit2_match_paired" is connected to a signal of width 78. The formal width of the signal in the module is 71.  Extra bits will be ignored.

zhao_q

那位大侠帮忙解释一下这些warning是怎么回事？怎么解决

HDLWorld

检查下位宽。

676748500

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