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PCB设计规则检查出现以下内容是什么意思?请高手指点
Processing Rule : Width Constraint (Min=20mil) (Max=20mil) (Prefered=20mil) (On the board )
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=15mil) (On the board ),(On the board )
Violation between Pad FV-2(42000mil,55735mil) MultiLayer and
Area Fill (41950mil,55560mil) (42050mil,55710mil) TopLayer
Violation between Pad FV-1(42000mil,54735mil) MultiLayer and
Area Fill (41950mil,54560mil) (42050mil,54710mil) TopLayer
Violation between Pad FV-2(42000mil,55735mil) MultiLayer and
Area Fill (41950mil,55560mil) (42050mil,55710mil) BottomLayer
Violation between Pad FV-1(42000mil,54735mil) MultiLayer and
Area Fill (41950mil,54560mil) (42050mil,54710mil) BottomLayer
Rule Violations :4
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