c6000 DSP 锁相环(PLL)编程范例

fish001

c6000 DSP 锁相环(PLL)编程范例 [复制链接]

C6000 DSP 锁相环(PLL)编程范例

1. /* Initialize PLL Registers */         
   
2.   /* Put PLL in bypass */
   
3. PLL_bypass();
   
4. PLLdelay(20);
   
5. 
   
6.   /* Reset PLL */
   
7. PLL_reset();
   
8. PLLdelay(20);
   
9. 
   
10.   /* Set main multiplier/divisor */
    
11.     PLL_RSET(PLLM,18);      //25MHz×18=450MHz
    
12.     PLL_RSET(PLLDIV0,PLL_PLLDIV0_RMK(1,0));  //450MHz/1=450MHz
    
13.     PLL_RSET(OSCDIV1,PLL_OSCDIV1_RMK(1,0));  //25MHz/1=25MHz(CLKOUT3)
    
14. 
    
15.      /* Set DSP clock */
    
16.     PLL_RSET(PLLDIV1,PLL_PLLDIV1_RMK(1,1));  //450MHz/2=225MHz
    
17.     PLLdelay(20);
    
18. 
    
19.      /* Set peripheral clock */
    
20.     PLL_RSET(PLLDIV2,PLL_PLLDIV2_RMK(1,3));  //450MHz/4=112.5MHz(CLKOUT2)
    
21.     PLLdelay(20);
    
22. 
    
23.      /* Set EMIF clock */
    
24.     PLL_RSET(PLLDIV3,PLL_PLLDIV3_RMK(1,4));  //450MHz/5=90MHz(ECLKOUT)
    
25.     PLLdelay(20);
    
26. 
    
27.      /* Take PLL out of reset */
    
28.     PLL_deassert();
    
29.     PLLdelay(1500);
    
30. 
    
31.      /* Enalbe PLL */
    
32.     PLL_enable();
    
33.     PLLdelay(20);

复制代码