DE1SOC OpenCL VGA 工程编译 mandelbrot
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[url=]DE1SOC OpenCL VGA 工程编译mandelbrot[/url]时间 :2015年4月2日
作者:knat
开发板:DE1SOC Rev C
百度网盘资料 :
操作步骤:- 拷贝FPGA工程
新建文件夹
mkdir -p ~/altera/14.1/hld/board/terasic/de1soc
将文件和解压,里面的内容拷贝到上述路径,
将board_enc.xml中的
[url=][/url]
改为
de1soc_sharedonly_vga">
- 设置环境变量
新建文件init.sh添加如下
#!/bin/bash
export ARCH=arm
export CROSS_COMPILE=/home/tank/app/gcc-linaro-arm-Linux-gnueabihf-4.9-xxxxx_linux/bin/arm-linux-gnueabihf-
export LOADADDR=0x8000
export QUARTUS_ROOTDIR=/home/tank/altera/14.1/quartus
export ALTERAOCLSDKROOT=/home/tank/altera/14.1/hld
export PATH=$PATH:${QUARTUS_ROOTDIR}/bin:${ALTERAOCLSDKROOT}/linux64/bin:${ALTERAOCLSDKROOT}/bin:/home/tank/altera/14.1/embedded/ds-5/bin
export LD_LIBRARY_PATH=${ALTERAOCLSDKROOT}/linux64/lib
export AOCL_BOARD_PACKAGE_ROOT=${ALTERAOCLSDKROOT}/board/terasic/de1soc
export QUARTUS_64BIT=1
export LM_LICENSE_FILE=/home/tank/altera/license.dat
export PATH=$PATH:/home/tank/app/gcc-linaro-arm-linux-gnueabihf-4.9-xxxxxx_linux/bin
保存,执行命令
source ./init.sh
- 编译硬件
查看可用硬件和编译OpenCL内核,(先进入到例程的路径)
aoc --list-boards
aoc device/ mandelbrot.cl --board de1soc_sharedonly_vga
编译时间较长,视PC的配置而定。其编译的过程是将包含OpenCL接口的de1soc_sharedonly_vgaDemo拷贝到当前路径下编译,编译后会生成xxxxx.aocx 和top.rbf文件
- 配置编译内核
先将config_opencl拷贝到内核路径下,用该文件配置所需要编译的内核
cp config_opencl .config
source ./init.sh make menuconfig
其中包括的内核配置有以下几点(config_opencl中已经包含这些配置,无需再配置)
4.1添加Framebuffer Driver:
Device Drivers -> Grapics support -> Support for frame buffer devices
Device Drivers -> Input device suport
分辨率1024 * 768
4.2使能CMA for OpenCL
Device Drivers -> Generic Driver Oprions
DMA CMA *
SIZE 512
Maximum Page 8
Maximum Count 7
4.3 Altera 固件下载和FPGA桥
Device Drivers -> Misc device
Device Drivers -> Misc device -> FPGA Bridges
4.4支持V4l2 和UVC USB摄像头
Device Drivers -> Multimedias support
V4l2 API 和V4l2 int device 以及 Media USB Adapter
Device Drivers -> Multimedias support ->Media USB Adapter
USB Video Class 是支持通用UVC设备,GSPCA中可选择其他设备(ZC301等)
4.5 选中EXT4文件系统的支持
Flie systems ->
Enable the block layer 支持larger block device and flies 否则EXTt4 mount 时会出错
4.6 编译 make uImage -j4 make zImage 生成的zImage和uIamge 在路径/home/tank/terasic/linux-socfpga_fb/arch/arm/boot下 5修改编译dtb 5.1修改文件 /home/tank/terasic/linux-socfpga_fb/arch/arm/boot/dts/socfpga.dtsi /home/tank/terasic/linux-socfpga_fb/arch/arm/boot/dts/socfpga_cyclone5.dts 在文件socfpga.dtsi将以下部分的注释取消,使用FPGA桥 hps_fpgabridge0: fpgabridge@0 { compatible = "altr,socfpga-hps2fpga-bridge"; label = "hps2fpga"; clocks = <&l4_main_clk>; };
hps_fpgabridge1: fpgabridge @1 { compatible = "altr,socfpga-lwhps2fpga-bridge"; label = "lwhps2fpga"; clocks = <&l4_main_clk>; };
hps_fpgabridge2: fpgabridge@2 { compatible = "altr,socfpga-fpga2hps-bridge"; label = "fpga2hps"; clocks = <&l4_main_clk>; }; 在socfpga_cyclone5.dts中修改为如下 hps_0_bridges: bridge@0xc0000000 { compatible = "altr,bridge-14.1", "simple-bus"; reg = <0xc0000000 0x20000000>, <0xff200000 0x00200000>; reg-names = "axi_h2f", "axi_h2f_lw"; #address-cells = <2>; #size-cells = <1>; ranges = <0x00000000 0x00000000 0xc0000000 0x00010000>, <0x00000001 0x00000100 0xFF200100 0x00000080>, <0x00000001 0x00010040 0xFF210040 0x00000020>, <0x00000001 0x00010080 0xFF210080 0x00000010>, <0x00000001 0x000100C0 0xFF2100C0 0x00000010>;
alt_vip_vfr_1: vip2@0x100 { compatible = "ALTR,vip-frame-reader-13.0", "ALTR,vip-frame-reader-9.1"; reg = <0x00000001 0x00000100 0x00000080 >; max-width = < 1024 >; max-height = < 768 >; mem-word-width = < 128 >; bits-per-color = < 8 >; }; //end vip@0x40100 (alt_vip_vfr_0)
acl_iface_led_pio: gpio@0x100010040 { compatible = "ALTR,pio-13.1", "ALTR,pio-1.0", "altr,pio-1.0"; reg = <0x00000001 0x00010040 0x00000020 >; width = < 4 >; /* embeddedsw.dts.params.width type NUMBER */ resetvalue = < 0 >; /* embeddedsw.dts.params.resetvalue type NUMBER */ #gpio-cells = < 2 >; gpio-controller; }; //end gpio@0x100010040 (acl_iface_led_pio) acl_iface_dipsw_pio: gpio@0x100010080 { compatible = "ALTR,pio-13.1", "ALTR,pio-1.0", "altr,pio-1.0"; reg = <0x00000001 0x00010080 0x00000010 >; interrupt-parent = < &intc >; interrupts = < 0 41 1 >; width = < 4 >; /* embeddedsw.dts.params.width type NUMBER */ resetvalue = < 0 >; /* embeddedsw.dts.params.resetvalue type NUMBER */ edge_type = < 2 >; /* embeddedsw.dts.params.edge_type type NUMBER */ level_trigger = < 0 >; /* embeddedsw.dts.params.level_trigger type NUMBER */ #gpio-cells = < 2 >; gpio-controller; }; //end gpio@0x100010080 (acl_iface_dipsw_pio)
acl_iface_button_pio: gpio@0x1000100C0 { compatible = "ALTR,pio-13.1", "ALTR,pio-1.0", "altr,pio-1.0"; reg = <0x00000001 0x000100C0 0x00000010 >; interrupt-parent = < &intc >; interrupts = < 0 42 1 >; width = < 2 >; /* embeddedsw.dts.params.width type NUMBER */ resetvalue = < 0 >; /* embeddedsw.dts.params.resetvalue type NUMBER */ edge_type = < 1 >; /* embeddedsw.dts.params.edge_type type NUMBER */ level_trigger = < 0 >; /* embeddedsw.dts.params.level_trigger type NUMBER */ #gpio-cells = < 2 >; gpio-controller; }; //end gpio@0x1000100C0 (acl_iface_button_pio)
}; //end bridge@0xc0000000 (hps_0_bridges) 以上部分地址与Qsys 中相互匹配,hps_0_bridges: 下有两个节点 reg-names = "axi_h2f", "axi_h2f_lw"; 其中 ranges = <0x00000000 0x00000000 0xc0000000 0x00010000>, <0x00000001 0x00000100 0xFF200100 0x00000080>, <0x00000001 0x00000100 0xFF200100 0x00000080>,依次是 <节点1,偏移地址,物理地址,地址范围>,其中节点1即为axi_h2f_lw桥 5.2编译dtb make socfpga_cyclone5.dtb 生成的socfpga_cyclone5.dtb 在路径/home/tank/terasic/linux-socfpga_fb/arch/arm/boot/dts下 6.编译驱动 在路径/home/tank/altera/14.1/hld/board/terasic/de1soc/driver下 make KDIR=/home/tank/terasic/linux-socfpga_fb 生成aclsoc_drv.ko 7.编译应用程序 在应用程序文件夹下编译应用 make,建议拷贝到开发板SD卡中,直接编译
8.制作SD卡镜像 cat /proc/partitions 查看磁盘,插入SD卡,再执行以上命令看增加的sdx就是SD卡 sudo dd if=DE1SOC_OpenCL_trusty_lxde.img of=/dev/sdx
将步骤3中生成的top.rbf拷贝到SD卡的Win(fat)分区,命名为opencl.rbf 将步骤4中生成的zImage拷贝到SD卡Win(fat)分区 将步骤5中生成的socfpga_cyclone5.dtb拷贝到SD卡Win(fat)分区,命名为socfpga.dtb 将步骤6中生成的aclsoc_drv.ko拷贝到SD卡linux分区(/home/root/opencl_arm32_rte_new/board/c5soc/driver) 将步骤3中生成的xxxxx.aocx拷贝到SD卡linux分区(/home/root) 将步骤7中生成的应用程序如 mandelbrot 拷贝到SD卡linux分区(/home/root) 9.配置文件系统环境
在SD卡的linux分区中etc/rc.loacl中添加 echo 1 > /sys/class/fpga-bridge/fpga2hps/enable echo 1 > /sys/class/fpga-bridge/hps2fpga/enable echo 1 > /sys/class/fpga-bridge/lwhps2fpga/enable 上述这些用于开启总线,以便VGA逻辑可以使用 在SD卡的linux分区中etc/bash.bashrc中添加 export CL_CONTEXT_COMPILER_MODE_ALTERA=3 上述内容用于开启禁止执行OpenCL应用时重新对FPGA进行编程,以便VGA逻辑不被刷掉黑屏。 10.执行opencl应用
设置开发板MSEL[4:0]---01010,可能需要将板子的USB-UART接上电才可启动系统(接入PC的USB口) 进入路径/home/root/ source ./init_opencl_new.sh 之后便可执行opencl应用了,例如执行mandelbrot
./mandelbrot -w=640 -h=480 -c=16 11.其他配置
手动设置IP ifconfig eth0 192.168.41.141 netmask 255.255.255.0 route add default gw 192.168.41.254 echo "nameserver 114.114.114.114 ">> /etc/resolv.conf 自动获取IP dhclient eth0 更新时间ntpdate ntp.ubuntu.com
12.已知问题1)最好保持uboot和硬件工程一致,保证对硬件正确初始化。
2)使用官方给的镜像添加OpenCL VGA Demo 使用时,由于uboot默认关闭了lw_hps2fpga总线桥,如需启动系统在VGA上显示终端或图形界面需要内核支持altera总线桥驱动并开启总线,开启方法 echo 1 > /sys/class/fpga-bridge/fpga2hps/enable echo 1 > /sys/class/fpga-bridge/hps2fpga/enable echo 1 > /sys/class/fpga-bridge/lwhps2fpga/enable - 默认执行OpenCL应用会重新对FPGA进行编程,这样会重刷VGA逻辑导致屏幕变黑,解决方法是修改OpenCL模式关闭重新编程功能,但这样就必需让opencl.rbf中包含对应的OpenCL内核。此时,不同的rbf与opencl应用不要混用。关闭opencl应用重编程的方法:
export CL_CONTEXT_COMPILER_MODE_ALTERA=3
Values to be supplied for context property CL_CONTEXT_COMPILER_MODE_ALTERA:
CL_CONTEXT_COMPILER_MODE_OFFLINE_ALTERA 0 CL_CONTEXT_COMPILER_MODE_OFFLINE_CREATE_EXE_LIBRARY_ALTERA 1 CL_CONTEXT_COMPILER_MODE_OFFLINE_USE_EXE_LIBRARY_ALTERA 2 CL_CONTEXT_COMPILER_MODE_PRELOADED_BINARY_ONLY_ALTERA 3
- 如果需要用对应的sof 生成rbf,其配置是这样的
在Quartus II File->Convert Programming Flies Programming file type 选Raw Binary File (.rbf) Mode选 Passive Parallel x16 Add File添加sof文件后还需要在Properties里面选择压缩格式(Compression) 这个模式对应的MSEL[4:0]为01010 (ppx16_compression) 如果不选择Compression 则对应的MSEL[4:0]为01000 (ppx16),即MSEL1是告诉uboot 该rbf是否进行了压缩。 - 一旦重新编译了内核,opencl的驱动必需重新编译并在文件系统中更新。
- opencl 编译需要正版的license,且license内的MAC必需是eth0的,可以在altera官网的大学计划申请,网址是:
- Linaro 官网中的很多ubuntu armhf的根目录文件,可以直接替换SD卡的linux分区来使用
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