STM32F205单片机通过FSMC 读写铁电存储器 FM22L16 数据发生偏移
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10 芯积分
STM32F205单片机通过FSMC 读写铁电存储器 FM22L16,当我直接运行程序,先在一个开始的地址那里把一定长度的数据写进存储器,然后再在同样的地址处,读取同样的长度的数据,下载,运行,写进去的数据和读出来的数据应该是一样的,因为我程序里面做了一个判断,如果两者数据是一样的话,就会点亮开发板上面的LED灯,否则,不能点亮LED灯。现在的现象是,LED能被点亮,说明两者的数据是一样的。
但是当我单步调试的时候,写入的数据和读取出来的数据就不一样了,读取出来的数据比写进去的数据多了0x80,(这是我在watch窗口看到的)掉电之后也是一样的情况,再次读取里面的数据,也是一样的情形,不知道这是为什么??
还有,这个铁电存储器 的框架如下,但是使用FSMC的时候,我该怎么选择不同的块呢?有8 个 32K * 16 的块 ,FSMC里面如何选择操作?
下面附上程序:void SRAM_Init(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable GPIOs clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
RCC_AHB1Periph_GPIOG, ENABLE);
/* Enable FSMC clock */
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
/*-- GPIOs Configuration
------------------+-----------------------+-------------------------+
PF0 <-> FSMC_A0 | PD14 <-> FSMC_D0 | PD5 <-> FSMC_NWE |
PF1 <-> FSMC_A1 | PD15 <-> FSMC_D1 | PD4 <-> FSMC_NOE |
PF2 <-> FSMC_A2 | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 |
PF3 <-> FSMC_A3 | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 |
PF4 <-> FSMC_A4 | PE7 <-> FSMC_D4 | |
PF5 <-> FSMC_A5 | PE8 <-> FSMC_D5 | //以下的PG10:(U2-CE) |
PF12 <-> FSMC_A6 | PE9 <-> FSMC_D6 | PG10 <-> FSMC_NCE4_1 |
PF13 <-> FSMC_A7 | PE10 <-> FSMC_D7 |-------------------------+
PF14 <-> FSMC_A8 | PE11 <-> FSMC_D8 |
PF15 <-> FSMC_A9 | PE12 <-> FSMC_D9 |
PG0 <-> FSMC_A10 | PE13 <-> FSMC_D10 |
PG1 <-> FSMC_A11 | PE14 <-> FSMC_D11 |
PG2 <-> FSMC_A12 | PE15 <-> FSMC_D12 |
PG3 <-> FSMC_A13 | PD8 <-> FSMC_D13 |
PG4 <-> FSMC_A14 | PD9 <-> FSMC_D14 |
PG5 <-> FSMC_A15 | PD10 <-> FSMC_D15 |
PD11 <-> FSMC_A16 |-----------------------+
PD12 <-> FSMC_A17 |
--------------------+*/
/* GPIOD configuration */
GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* GPIOE configuration */
GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_7 | GPIO_Pin_8 |
GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12|
GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* GPIOF configuration */
GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
/* GPIOG configuration */
GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource10 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 |GPIO_Pin_10 ;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/**************************************************************************************
**FSMC_AddressSetupTime:
<Defines the number of HCLK cycles to configurethe duration of the address setup time.
This parameter can be a value between 0 and 0xF.
@note This parameter is not used with synchronous NOR Flash memories.
**FSMC_AddressHoldTime:
< Defines the number of HCLK cycles to configure the duration of the address hold time.
This parameter can be a value between 0 and 0xF.
@note This parameter is not used with synchronous NOR Flash memories.
**FSMC_DataSetupTime:
< Defines the number of HCLK cycles to configure the duration of the data setup time.
This parameter can be a value between 0 and 0xFF.
@note This parameter is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories.
**FSMC_BusTurnAroundDuration:
< Defines the number of HCLK cycles to configure the duration of the bus turnaround.
This parameter can be a value between 0 and 0xF.
@note This parameter is only used for multiplexed NOR Flash memories.
**FSMC_CLKDivision:
< Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
This parameter can be a value between 1 and 0xF.
@note This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses.
**FSMC_DataLatency:
< Defines the number of memory clock cycles to issue to the memory before getting the first data.
The parameter value depends on the memory type as shown below:
- It must be set to 0 in case of a CRAM
- It is don't care in asynchronous NOR, SRAM or ROM accesses
- It may assume a value between 0 and 0xF in NOR Flash memories with synchronous burst mode enable
**FSMC_AccessMode:
< Specifies the asynchronous access mode. This parameter can be a value of @ref FSMC_Access_Mode
***************************************************************************************/
/*-- FSMC Configuration 此函数需要详细配置-------------------------------------*/
p.FSMC_AddressSetupTime = 0;// Defines the number of HCLK cycles to configure the duration of the address setup time,(0~0xF),not use in NOR FLash
p.FSMC_AddressHoldTime = 0; // Defines the number of HCLK cycles to configure the duration of the address hold time (0~0xF) not use in NOR FLash
p.FSMC_DataSetupTime = 4; // Defines the number of HCLK cycles to configure the duration of the duration of the data setup time(0~0xF) use in NOR SRAMs ROMs
p.FSMC_BusTurnAroundDuration = 1; //Defines the number of HCLK cycles to configure the duration of the bus turnaround(0~0xF) only used NOR FLash
p.FSMC_CLKDivision = 0; //Defines the period of CLK clock output signal, expressed in number of HCLK cycles.This parameter can be a value between 1 and 0xF. not use for NOR Flash SRAM ROM
p.FSMC_DataLatency = 0; //Defines the number of memory clock cycles to issue to the memory before getting the first data
p.FSMC_AccessMode = FSMC_AccessMode_A; //Specifies the asynchronous(异步) access mode
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; //NOR Flash/PSRAM 控制器 BANK1的3子Bank
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
// FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; //Timing Parameters for write and read access if the ExtendedMode is not used
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; //Timing Parameters for write access if the ExtendedMode is used
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
/*!< Enable FSMC FSMC_Bank1_NORSRAM3 Bank */
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
}
void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
{
for (; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */
{
/* Transfer data to the memory */
*(uint16_t *) (Bank1_SRAM3_ADDR + WriteAddr) = *pBuffer++;
/* Increment the address*/
WriteAddr += 2;
}
}
void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead)
{
for (; NumHalfwordToRead != 0; NumHalfwordToRead--) /* while there is data to read */
{
/* Read a half-word from the memory */
*pBuffer++ = *(__IO uint16_t*) (Bank1_SRAM3_ADDR + ReadAddr);
/* Increment the address*/
ReadAddr += 2;
}
}
/**
* 功能:填充整个缓存区
* 参数pBuffer: 指向需要填充的缓存区的指针
* 参数BufferSize: 填充的缓存区的大小
* 参数Offset: 缓存区中需要填充的第一个数据,然后是依次叠加
*/
void Fill_Buffer(uint16_t *pBuffer, uint16_t BufferLenght, uint32_t Offset)
{
uint16_t IndexTmp = 0;
for (IndexTmp = 0; IndexTmp < BufferLenght; IndexTmp++ )
{
pBuffer[IndexTmp] = IndexTmp + Offset;
}
}
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以下是主程序
// 配置 FSMC Bank1 NOR Flash/SRAM 3 NOR Flash 控制器
SRAM_Init();
Fill_Buffer(TxBuffer, BUFFER_SIZE1, 0x32); //填充数据
SRAM_WriteBuffer(TxBuffer, WRITE_READ_ADDR1, BUFFER_SIZE1); //将TxBuffer中的数据写入到指定区中
SRAM_ReadBuffer(RxBuffer, WRITE_READ_ADDR1, BUFFER_SIZE1); //读取指定长度的数据到 RxBuffer
// Read back SRAM memory and check content correctness
for (Index = 0x00; (Index < BUFFER_SIZE1) && (WriteReadStatus == 0); Index++)
{
if (TxBuffer[Index] != (RxBuffer[Index]-0x00)) //掉电发生偏移,偏移量为 0x80
{
WriteReadStatus++;
}
}
if (WriteReadStatus == 0) //OK , Turn on LD4,LD5
{
GPIO_ResetBits(GPIOE, GPIO_Pin_2);
GPIO_ResetBits(GPIOE, GPIO_Pin_3);
}
else //fail , Turn off LD4,LD5
{
GPIO_SetBits(GPIOE, GPIO_Pin_2);
GPIO_SetBits(GPIOE, GPIO_Pin_3);
}
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