MSP430 5438A的DMA 在块传输模式中为什么不能从内存直接到UCA0TXBUF,帮我看下程序...
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#include
#define uchar unsigned char
#define uint unsigned int
#define ulong unsigned long int #define CPU_F ((double)24000000UL) //XT2 --> 24MHZ
#define Delay_us(x) __delay_cycles((long)(CPU_F*(double)x/1000000.0)) //延时1us
#define Delay_ms(x) __delay_cycles((long)(CPU_F*(double)x/1000.0)) //延时1ms
#define DataLenth 8 void Set_Vcore(uint level);
void Init_Clock();
void UA0SendUart(unsigned char *pBuffer,unsigned char n_byte);
void UA0Init();
void DMA0Init(unsigned int lenth);
unsigned char SendData[DataLenth];
static char ReciveData[DataLenth]="asfdsf";
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
Init_Clock();
UA0Init(); // Enable USCI_A0 RX interrupt
DMA0Init(DataLenth);
DMA0CTL |= DMAREQ;//启动DMA
__bis_SR_register(LPM2_bits | GIE);
}
void UA0SendUart(unsigned char *pBuffer,unsigned char n_byte)
{
unsigned char q0;
for(q0=0;q0
{
while (!(UCA0IFG&UCTXIFG));//查询是否发送完毕,发送一个字节完成后会产生中断
UCA0TXBUF=*pBuffer;
pBuffer++;
}
} void UA0Init()
{
P3SEL = 0x30; // P3.4,5 = USCI_A0 TXD/RXD
UCA0CTL1 |= UCSWRST; // **Put state machine in reset**
UCA0CTL1 |= UCSSEL_1; // CLK = ACLK
UCA0BR0 = 0x03; // 32kHz/9600=3.41 (see User's Guide)
UCA0BR1 = 0x00; //
UCA0MCTL = UCBRS_3+UCBRF_0; // Modulation UCBRSx=3, UCBRFx=0
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
UCA0IE |= UCRXIE;
}
void DMA0Init(unsigned int lenth)
{
DMACTL0 |= 0;//选择软件触发
//DMACTL4 |=(1<<3);//CPU读写操作时禁止DMA传输
DMACTL4 &=~(1<<0);//当DMA在传输时其他中断不会打破DMA的传输
__data16_write_addr((unsigned short) &DMA0SA,(unsigned long) ReciveData);
__data16_write_addr((unsigned short) &DMA0DA,(unsigned long)&UCA0TXBUF );
DMA0SZ =8;
DMA0CTL = DMADT_1 | DMASRCINCR_3 |DMASBDB | DMAEN;
}
void Init_Clock()
{
uchar i;
P5SEL |= BIT2 + BIT3; //P5.2和P5.3选择为晶振XT2输入
P7SEL |= BIT0 + BIT1; //P7.0和P7.1选择为晶振XT1输入
//Set_Vcore(PMMCOREV_3); // Set frequency up to 25MHz
UCSCTL6 &= ~(XT1OFF + XT2OFF); // Set XT1 & XT2 On
UCSCTL6 |= XCAP_3; // Internal load XT1 cap 12pF,MSP430F5438A V4.0最小系统XT1未接外部晶振
do // Loop until XT1,XT2 & DCO stabilizes
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
SFRIFG1 &= ~OFIFG; // 清除振荡器失效标志
for (i = 0xFF; i > 0; i--); // 延时,等待XT2起振
} while (SFRIFG1 & OFIFG); // 判断XT2是否起振
Delay_ms(50);
UCSCTL4 |= SELA__XT1CLK + SELS__XT2CLK + SELM__XT2CLK; //选择MCLK、SMCLK为XT2,
}
#pragma vector=USCI_A2_VECTOR
__interrupt void USCI_A2_ISR(void)
{
static unsigned char i=0;
switch(__even_in_range(UCA2IV,4))
{
case 0:break; // Vector 0 - no interrupt
case 2: // Vector 2 - RXIFG
//while (!(UCA1IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
ReciveData= UCA1RXBUF; // TX -> RXed character
i++;
if(ReciveData[0] == 0xff && ReciveData[ DataLenth - 1] == 0xee)
{
DMA0CTL |= DMAREQ;//使能DMA0
}
else
{
UA0SendUart("it is a else printf\n",sizeof("it is a else printf\n"));
DMA0CTL |= DMAREQ;//使能DMA0
}
break;
case 4:break; // Vector 4 - TXIFG
default: break;
}
}
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