8.5.2 Write to User Programmable Registers
The device features three user-programmable registers: the configuration register (CFR), the REFDAC_A
register, and the REFDAC_B register. These registers can be written with the device SDI pin. The first 16 bits of
data on SDI are latched into the device on the first 16 SCLK falling edges. However, the new configuration takes
effect only when the read or write operation is validated. If these registers are not required to update, SDI must
remain low during the respective frames.
The first four SDI data bits (B[15:12]) determine what operation is performed (that is, either a read or write
operation or no operation), which register address the operation uses, and the function of the next 12 SDI data
bits (B[11:0]).
Table 4 lists the various combinations supported for B[15:12].
Table 4. Data Write Operation
B15 B14 B13 B12 OPERATION FUNCTION OF BITS B[11:0]
0 0 0 0 No operation is performed These bits are ignored
0 0 0 1 REFDAC_A read 000h; See the Reading User-Programmable Registers section
0 0 1 0 REFDAC_B read 000h; See the Reading User-Programmable Registers section
0 0 1 1 CFR read 000h; See the Reading User-Programmable Registers section
1 0 0 0 CFR write See the Configuration Register (CFR) section
1 0 0 1 REFDAC_A write See the REFDAC_A section
1 0 1 0 REFDAC_B write See the REFDAC_B section
1 0 1 1 No operation is performed These bits are ignored
X 1 X X No operation is performed These bits are ignored