【FPGA助学系列-PS2键盘】

白丁 · 发表于2013-11-29 22:35

【FPGA助学系列-PS2键盘】 [复制链接]

PS2使用一种双向同步串行协议。

端口结构及引脚定义如下

file:///C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp\ksohtml\wps_clip_image-1264.png

当键盘的处理器发现有按键被按下、释放或按住，将发送扫描的信息包到计算机。

扫描码有两种不同的类型：通码和段码。当按键被按下或者按住就发送通码，当按键被释放就发送段码，每个按键都具有唯一的通码和段码，所以主机知道那个按键被按下。

当按键被释放之后，键盘CPU会在扫描码前加一个“F0”作为按键释放信号，如果是扩展键将在扫描码之前加上“E0F0”作为开头。

从键盘发送到主机的数据在时钟的下降沿被读取。

串行协议每帧包含11位：1bit起始位，始终为0；8bit数据位，排列顺序由低到高；1bit奇偶校验位（奇校验）；1bit结束位，始终为1。

白丁 · 发表于2013-11-29 22:37

来个John Clayton的PS2程序

`define TOTAL_BITS 11
`define EXTEND_CODE 16'hE0
`define RELEASE_CODE 16'hF0
`define LEFT_SHIFT 16'h12
`define RIGHT_SHIFT 16'h59
module ps2_keyboard_interface(
clk,
rst_n,
ps2_clk,
ps2_data,
rx_extended,
rx_released,
rx_shift_key_on,
rx_scan_code,
rx_ascii,
rx_data_ready, // rx_read_o
rx_read, // rx_read_ack_i
tx_data,
tx_write,
tx_write_ack_o,
tx_error_no_keyboard_ack
);
// I/O declarations
input clk; //系统时钟
input rst_n; //复位,低电平有效
inout ps2_clk; //ps2时钟线，双向端口
inout ps2_data; //ps2数据线，双向端口
output rx_extended; //扩展码标志
output rx_released; //断码标志
output rx_shift_key_on; //shift键状态标志
output [7:0] rx_scan_code; //扫描码输出
output [7:0] rx_ascii; //ASCII码输出
output rx_data_ready; //收到新数据置位，读取后清零
input rx_read; //读数据指示，有新数据且rx_read=1时，清rx_data_ready标志
input [7:0] tx_data; //要发送给ps2键盘的数据或指令
input tx_write; //发送指令请求，高电平有效
output tx_write_ack_o; //写指令状态，写指令前为1，写过程为0，写完为1，结束写请求后为0
output tx_error_no_keyboard_ack; //ps2键盘应答出错指示
//I/O寄存器
reg rx_extended_r;
reg rx_released_r;
reg [7:0] rx_scan_code_r;
reg [7:0] rx_ascii_r;
reg rx_data_ready_r;
reg tx_error_no_keyboard_ack_r;
//内部寄存器
reg [`TOTAL_BITS-1:0] q; //移位寄存器，用于接收或发送数据
reg [3:0] m1_state; //状态机M1
reg [3:0] m1_next_state;
reg m2_state; //状态机M2
reg m2_next_state;
reg [3:0] bit_count; //移位计数器
reg enable_timer_60usec; //60微妙计数器使能控制
reg enable_timer_5usec; //5微妙计数器使能控制
reg [TIMER_60USEC_BITS_PP-1:0] timer_60usec_count; //60微妙计数器
reg [TIMER_5USEC_BITS_PP-1:0] timer_5usec_count; //5微妙计数器
reg [7:0] ascii; //ASCII码
reg left_shift_key; //左shift键标志
reg right_shift_key; //右shift键标志
reg hold_extended; //保持原先的值,复位或有新值输出(rx_output_event=1)清零
reg hold_released; //保持原先的值,复位或有新值输出(rx_output_event=1)清零
reg ps2_clk_r; //同步ps2时钟信号
reg ps2_data_r; //同步ps2数据信号
reg ps2_clk_hi_z; //无操作，输出高阻，外部上拉为高电平
reg ps2_data_hi_z; //无操作，输出高阻，外部上拉为高电平
//内部信号
wire timer_60usec_done; //60微秒计数器溢出标志
wire timer_5usec_done; //5微秒计数器溢出标志
wire extended; //扩展码标志
wire released; //断码标志
wire shift_key_on;
wire rx_output_event; //收到键盘发送过来的一帧数据置位，且不是0xE0和0xF0
wire rx_output_strobe; //收到键盘发送过来的一帧数据置位，且不是0xE0、0xF0和shift键值
wire tx_parity_bit; //奇偶校验位
wire rx_shifting_done; //接收一帧数据完毕置位
wire tx_shifting_done; //发送一帧数据完毕置位
wire [8:0] shift_key_plus_code; //包含shift键状态的扫描码
//计数器参数
//以96M时钟计算
parameter TIMER_60USEC_VALUE = 5760; //60微秒延时计数值
parameter TIMER_60USEC_BITS = 13; //60微秒延时计时位宽
parameter TIMER_5USEC_VALUE = 480; //5微秒延时计数值
parameter TIMER_5USEC_BITS = 9; //5微秒延时计数值
parameter TRAP_SHIFT_KEYS = 0; //默认：No shift key trap
//状态机M1状态参数
parameter m1_rx_clk_h = 1;
parameter m1_rx_clk_l = 0;
parameter m1_rx_falling_edge_marker = 13;
parameter m1_rx_rising_edge_marker = 14;
parameter m1_tx_force_clk_l = 3;
parameter m1_tx_first_wait_clk_h = 10;
parameter m1_tx_first_wait_clk_l = 11; //zhongligongwu
parameter m1_tx_reset_timer = 12;
parameter m1_tx_wait_clk_h = 2;
parameter m1_tx_clk_h = 4;
parameter m1_tx_clk_l = 5;
parameter m1_tx_wait_keyboard_ack = 6;
parameter m1_tx_done_recovery = 7;
parameter m1_tx_error_no_keyboard_ack = 8;
parameter m1_tx_rising_edge_marker = 9;
//状态机M2状态参数
parameter m2_rx_data_ready = 1;
parameter m2_rx_data_ready_ack = 0;
assign ps2_clk = ps2_clk_hi_z?1'bZ:1'b0; ////ps2时钟线输出
assign ps2_data = ps2_data_hi_z?1'bZ:1'b0;//ps2数据线输出
assign rx_extended = rx_extended_r;
assign rx_released = rx_released_r;
assign rx_scan_code = rx_scan_code_r;
assign rx_ascii = rx_ascii_r;
assign rx_data_ready = rx_data_ready_r;
assign tx_error_no_keyboard_ack = tx_error_no_keyboard_ack_r;
//同步输入时钟数据信号
always(posedge clk)
begin
ps2_clk_r <= ps2_clk;
ps2_data_r <= ps2_data;
end
/***************************状态机M1*************************************/
//
always@(posedge clk)
begin
if(!rst_n)
m1_state <= m1_rx_clk_h;
else
m1_state <= m1_next_state;
end
//m1状态转换逻辑
always @(m1_state
or q
or tx_shifting_done
or tx_write
or ps2_clk_r
or ps2_data_r
or timer_60usec_done
or timer_5usec_done
)
begin
ps2_clk_hi_z <= 1;
ps2_data_hi_z <= 1;
tx_error_no_keyboard_ack <= 0;
enable_timer_60usec <= 0;
enable_timer_5usec <= 0;
case (m1_state)
//以下四个状态为从ps2读数据到主机
m1_rx_clk_h : //读状态时钟,高电平
begin
enable_timer_60usec <= 1;
if (tx_write)
m1_next_state <= m1_tx_reset_timer;
else if (~ps2_clk_1)
m1_next_state <= m1_rx_falling_edge_marker;
else m1_next_state <= m1_rx_clk_h;
end
m1_rx_falling_edge_marker : //读状态时钟下降沿标志
begin
enable_timer_60usec <= 0;
m1_next_state <= m1_rx_clk_l;
end
m1_rx_clk_l : //读状态时钟低电平
begin
enable_timer_60usec <= 1;
if (tx_write)
m1_next_state <= m1_tx_reset_timer;
else if (ps2_clk_s)
m1_next_state <= m1_rx_rising_edge_marker;
else
m1_next_state <= m1_rx_clk_l;
end
m1_rx_rising_edge_marker : //读状态时钟上升沿标志
begin
enable_timer_60usec <= 0;
m1_next_state <= m1_rx_clk_h;
end
/********************************************************/
//以下为发送指令到ps2键盘的转换状态
m1_tx_reset_timer: //写指令开始状态
begin
enable_timer_60usec <= 0;
m1_next_state <= m1_tx_force_clk_l;
end
m1_tx_force_clk_l ://抑制通信，拉低时钟线(100微秒以上)准备发送指令给ps2键盘
begin
enable_timer_60usec <= 1;
ps2_clk_hi_z <= 0; //强制拉低ps2_clk时钟线
if (timer_60usec_done)
m1_next_state <= m1_tx_first_wait_clk_h;
else
m1_next_state <= m1_tx_force_clk_l;
end
m1_tx_first_wait_clk_h : //等待ps2键盘把时钟线拉低
begin
enable_timer_5usec <= 1;
ps2_data_hi_z <= 0; // 发送起始位
if (~ps2_clk_r && timer_5usec_done)
m1_next_state <= m1_tx_clk_l;
else
m1_next_state <= m1_tx_first_wait_clk_h;
end
// This state must be included because the device might possibly
// delay for up to 10 milliseconds before beginning its clock pulses.
// During that waiting time, we cannot drive the data (q[0]) because it
// is possibly 1, which would cause the keyboard to abort its receive
// and the expected clocks would then never be generated.
m1_tx_first_wait_clk_l :
begin
ps2_data_hi_z <= 0;
if (~ps2_clk_s)
m1_next_state <= m1_tx_clk_l;
else
m1_next_state <= m1_tx_first_wait_clk_l;
end
m1_tx_wait_clk_h :
begin
enable_timer_5usec <= 1;
ps2_data_hi_z <= q[0];
if (ps2_clk_s && timer_5usec_done)
m1_next_state <= m1_tx_rising_edge_marker;
else
m1_next_state <= m1_tx_wait_clk_h;
end
m1_tx_rising_edge_marker :
begin
ps2_data_hi_z <= q[0];
m1_next_state <= m1_tx_clk_h;
end
m1_tx_clk_h :
begin
ps2_data_hi_z <= q[0];
if (tx_shifting_done)
m1_next_state <= m1_tx_wait_keyboard_ack;
else if (~ps2_clk_s)
m1_next_state <= m1_tx_clk_l;
else
m1_next_state <= m1_tx_clk_h;
end
m1_tx_clk_l :
begin
ps2_data_hi_z <= q[0];
if (ps2_clk_s)
m1_next_state <= m1_tx_wait_clk_h;
else
m1_next_state <= m1_tx_clk_l;
end
m1_tx_wait_keyboard_ack :
begin
if (~ps2_clk_s && ps2_data_s)
m1_next_state <= m1_tx_error_no_keyboard_ack; //应答出错
else if (~ps2_clk_s && ~ps2_data_s)
m1_next_state <= m1_tx_done_recovery;
else m1_next_state <= m1_tx_wait_keyboard_ack;
end
m1_tx_done_recovery :
begin
if (ps2_clk_s && ps2_data_s)
m1_next_state <= m1_rx_clk_h;
else
m1_next_state <= m1_tx_done_recovery;
end
m1_tx_error_no_keyboard_ack :
begin
tx_error_no_keyboard_ack <= 1;
if (ps2_clk_s && ps2_data_s)
m1_next_state <= m1_rx_clk_h;
else
m1_next_state <= m1_tx_error_no_keyboard_ack;
end
default : m1_next_state <= m1_rx_clk_h;
endcase
end
/**************************************************************/
//产生数据输出状态标志
//rx_data_ready_r=1时有数据输出，rx_data_ready_r=0时无数据输出
//读数据时(rx_read=1)rx_data_ready_r将为0
/*************************************************************/
//状态机m2
always @(posedge clk)
begin
if (!reset)
m2_state <= m2_rx_data_ready_ack;
else
m2_state <= m2_next_state;
end
// m2状态逻辑转换
always @(m2_state or rx_output_strobe or rx_read)
begin : m2_state_logic
case (m2_state)
m2_rx_data_ready_ack:
begin
rx_data_ready <= 1'b0;
if (rx_output_strobe)
m2_next_state <= m2_rx_data_ready;
else
m2_next_state <= m2_rx_data_ready_ack;
end
m2_rx_data_ready:
begin
rx_data_ready <= 1'b1;
if (rx_read)
m2_next_state <= m2_rx_data_ready_ack;
else
m2_next_state <= m2_rx_data_ready;
end
default : m2_next_state <= m2_rx_data_ready_ack;
endcase
end
//位移计数器
always @(posedge clk)
begin
if ( !reset
|| rx_shifting_done
|| (m1_state == m1_tx_wait_keyboard_ack) // After tx is done.
)
bit_count <= 0; // normal reset
else if (timer_60usec_done
&& (m1_state == m1_rx_clk_h)
&& (ps2_clk_s)
)
bit_count <= 0; // rx watchdog timer reset
else if ( (m1_state == m1_rx_falling_edge_marker) // increment for rx
||(m1_state == m1_tx_rising_edge_marker) // increment for tx
)
bit_count <= bit_count + 1;
end
// 指示一帧数据读完或写完
assign rx_shifting_done = (bit_count == `TOTAL_BITS);
assign tx_shifting_done = (bit_count == `TOTAL_BITS-1);
//这个信号用来使能加载要发送到ps2键盘的数据到移位寄存器同时也指示发送指令的传输过程
//写指令状态，写指令前为1，写过程为0，写完为1，结束写请求后为0
assign tx_write_ack_o = ( (tx_write && (m1_state == m1_rx_clk_h))
||(tx_write && (m1_state == m1_rx_clk_l))
);
// 奇校验位
assign tx_parity_bit = ~^tx_data;
//串行数据移位寄存器
always @(posedge clk)
begin
if (!reset) q <= 0;
else if (tx_write_ack_o)
q <= {1'b1,tx_parity_bit,tx_data,1'b0};
else if ( (m1_state == m1_rx_falling_edge_marker)
||(m1_state == m1_tx_rising_edge_marker) )
q <= {ps2_data_s,q[`TOTAL_BITS-1:1]};
end
// 60微秒定时计数器
always @(posedge clk)
begin
if (~enable_timer_60usec)
timer_60usec_count <= 0;
else if (~timer_60usec_done)
timer_60usec_count <= timer_60usec_count + 1;
end
assign timer_60usec_done = (timer_60usec_count == (TIMER_60USEC_VALUE_PP - 1));
// 5微秒定时计数器
always @(posedge clk)
begin
if (~enable_timer_5usec)
timer_5usec_count <= 0;
else if (~timer_5usec_done)
timer_5usec_count <= timer_5usec_count + 1;
end
assign timer_5usec_done = (timer_5usec_count == TIMER_5USEC_VALUE_PP - 1);
//输出扩展码标志及断码标志
assign extended = (q[8:1] == `EXTEND_CODE) && rx_shifting_done;
assign released = (q[8:1] == `RELEASE_CODE) && rx_shifting_done;
//复位或输出有效键码(非0xF0或0xE0)时清零扩展、断码标志位
//输出键码为扩展码、断码时置相应标志位
always @(posedge clk)
begin
if (!reset || rx_output_event)
begin
hold_extended <= 0;
hold_released <= 0;
end
else
begin
if (rx_shifting_done && extended)
hold_extended <= 1;
if (rx_shifting_done && released)
hold_released <= 1;
end
end
/**********************************************************************/
//shift按键检测
//左shift按键检测
// These bits contain the status of the two shift keys
always @(posedge clk)
begin
if (!reset)
left_shift_key <= 0;
else if ((q[8:1] == `LEFT_SHIFT) && rx_shifting_done && ~hold_released)//shift键通码
left_shift_key <= 1;
else if ((q[8:1] == `LEFT_SHIFT) && rx_shifting_done && hold_released)//shift键断码
left_shift_key <= 0;
end
//右shift按键检测
always @(posedge clk)
begin
if (!reset)
right_shift_key <= 0;
else if ((q[8:1] == `RIGHT_SHIFT) && rx_shifting_done && ~hold_released)//shift键通码
right_shift_key <= 1;
else if ((q[8:1] == `RIGHT_SHIFT) && rx_shifting_done && hold_released)//shift键断码
right_shift_key <= 0;
end
//输出shift状态标志，shift键按住输出1，释放输出0
assign rx_shift_key_on = left_shift_key || right_shift_key;
/****************************************************************************/
//输出特殊扫描码标志位，及扫描码值和ASCII码
//通过rx_extended_r、rx_released_r的值可判断是断码、通码，还是扩展码
always @(posedge clk)
begin
if (!reset)
begin
rx_extended <= 0;
rx_released <= 0;
rx_scan_code <= 0;
rx_ascii <= 0;
end
else if (rx_output_strobe)
begin
rx_extended <= hold_extended; //载入之前保存的状态值
rx_released <= hold_released; //载入之前保存的状态值
rx_scan_code <= q[8:1];
rx_ascii <= ascii;
end
end
//收到键盘发送过来的键码，且键码不是0xE0(扩展码前都有0xE0)和0xF0(断码前都有0xF0)
assign rx_output_event = (rx_shifting_done
&& ~extended
&& ~released
);
//收到键盘发送过来的键码,
//且不是键码0xE0(扩展码前都有0xE0)和0xF0(断码前都有0xF0),而且不是shift的键值
assign rx_output_strobe = (rx_shifting_done
&& ~extended
&& ~released
&& ( (TRAP_SHIFT_KEYS_PP == 0)
|| ( (q[8:1] != `RIGHT_SHIFT)
&&(q[8:1] != `LEFT_SHIFT)
)
)
);
/***************************************************************************/
//这部分将键盘的扫描码转换成ASCII码,这里只列了一部分,
//如果需要更多键码,可以找相关的扫描键码增加到下面case语句
//表中的9'hxxx最高位为1表示有shift键按下
assign shift_key_plus_code = {rx_shift_key_on,q[8:1]};
always @(shift_key_plus_code)
begin
casez (shift_key_plus_code)
12'h?66 : ascii <= 8'h08; // Backspace ("backspace" key)
12'h?0d : ascii <= 8'h09; // Horizontal Tab
12'h?5a : ascii <= 8'h0d; // Carriage return ("enter" key)
12'h?76 : ascii <= 8'h1b; // Escape ("esc" key)
12'h?29 : ascii <= 8'h20; // Space
12'h116 : ascii <= 8'h21; // !
12'h152 : ascii <= 8'h22; // "
12'h126 : ascii <= 8'h23; // #
12'h125 : ascii <= 8'h24; // $
12'h12e : ascii <= 8'h25; // %
12'h13d : ascii <= 8'h26; // &
12'h052 : ascii <= 8'h27; // '
12'h146 : ascii <= 8'h28; // (
12'h145 : ascii <= 8'h29; // )
12'h13e : ascii <= 8'h2a; // *
12'h155 : ascii <= 8'h2b; // +
12'h041 : ascii <= 8'h2c; // ,
12'h04e : ascii <= 8'h2d; // -
12'h049 : ascii <= 8'h2e; // .
12'h04a : ascii <= 8'h2f; // /
12'h045 : ascii <= 8'h30; // 0
12'h016 : ascii <= 8'h31; // 1
12'h01e : ascii <= 8'h32; // 2
12'h026 : ascii <= 8'h33; // 3
12'h025 : ascii <= 8'h34; // 4
12'h02e : ascii <= 8'h35; // 5
12'h036 : ascii <= 8'h36; // 6
12'h03d : ascii <= 8'h37; // 7
12'h03e : ascii <= 8'h38; // 8
12'h046 : ascii <= 8'h39; // 9
12'h14c : ascii <= 8'h3a; // :
12'h04c : ascii <= 8'h3b; // ;
12'h141 : ascii <= 8'h3c; // <
12'h055 : ascii <= 8'h3d; // =
12'h149 : ascii <= 8'h3e; // >
12'h14a : ascii <= 8'h3f; // ?
12'h11e : ascii <= 8'h40; // @
12'h11c : ascii <= 8'h41; // A
12'h132 : ascii <= 8'h42; // B
12'h121 : ascii <= 8'h43; // C
12'h123 : ascii <= 8'h44; // D
12'h124 : ascii <= 8'h45; // E
12'h12b : ascii <= 8'h46; // F
12'h134 : ascii <= 8'h47; // G
12'h133 : ascii <= 8'h48; // H
12'h143 : ascii <= 8'h49; // I
12'h13b : ascii <= 8'h4a; // J
12'h142 : ascii <= 8'h4b; // K
12'h14b : ascii <= 8'h4c; // L
12'h13a : ascii <= 8'h4d; // M
12'h131 : ascii <= 8'h4e; // N
12'h144 : ascii <= 8'h4f; // O
12'h14d : ascii <= 8'h50; // P
12'h115 : ascii <= 8'h51; // Q
12'h12d : ascii <= 8'h52; // R
12'h11b : ascii <= 8'h53; // S
12'h12c : ascii <= 8'h54; // T
12'h13c : ascii <= 8'h55; // U
12'h12a : ascii <= 8'h56; // V
12'h11d : ascii <= 8'h57; // W
12'h122 : ascii <= 8'h58; // X
12'h135 : ascii <= 8'h59; // Y
12'h11a : ascii <= 8'h5a; // Z
12'h054 : ascii <= 8'h5b; // [
12'h05d : ascii <= 8'h5c; // \
12'h05b : ascii <= 8'h5d; // ]
12'h136 : ascii <= 8'h5e; // ^
12'h14e : ascii <= 8'h5f; // _
12'h00e : ascii <= 8'h60; // `
12'h01c : ascii <= 8'h61; // a
12'h032 : ascii <= 8'h62; // b
12'h021 : ascii <= 8'h63; // c
12'h023 : ascii <= 8'h64; // d
12'h024 : ascii <= 8'h65; // e
12'h02b : ascii <= 8'h66; // f
12'h034 : ascii <= 8'h67; // g
12'h033 : ascii <= 8'h68; // h
12'h043 : ascii <= 8'h69; // i
12'h03b : ascii <= 8'h6a; // j
12'h042 : ascii <= 8'h6b; // k
12'h04b : ascii <= 8'h6c; // l
12'h03a : ascii <= 8'h6d; // m
12'h031 : ascii <= 8'h6e; // n
12'h044 : ascii <= 8'h6f; // o
12'h04d : ascii <= 8'h70; // p
12'h015 : ascii <= 8'h71; // q
12'h02d : ascii <= 8'h72; // r
12'h01b : ascii <= 8'h73; // s
12'h02c : ascii <= 8'h74; // t
12'h03c : ascii <= 8'h75; // u
12'h02a : ascii <= 8'h76; // v
12'h01d : ascii <= 8'h77; // w
12'h022 : ascii <= 8'h78; // x
12'h035 : ascii <= 8'h79; // y
12'h01a : ascii <= 8'h7a; // z
12'h154 : ascii <= 8'h7b; // {
12'h15d : ascii <= 8'h7c; // |
12'h15b : ascii <= 8'h7d; // }
12'h10e : ascii <= 8'h7e; // ~
12'h?71 : ascii <= 8'h7f; // (Delete OR DEL on numeric keypad)
default : ascii <= 8'h2e; // '.' used for unlisted characters.
endcase
end
endmodule

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kdy · 发表于2013-11-29 23:38

先赞一个

调戏、和尚/

好给力。第一次看到把Verilog 写这么牛逼的人。佩服佩服、、、

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