请教MSP430FR5739的FRAM空间模拟问题

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请教MSP430FR5739的FRAM空间模拟问题 [复制链接]

请问要怎么在MSP430FR5739的FRAM空间模拟出一张表A0/A2  各占256个字节，然后在里面实现读写操作？？？？？那位大侠帮帮小弟。代码如下：小弟只填了一点点。。。。。



//******************************************************************************
//  MSP430FR57xx Demo - USCI_B0 I2C Slave RX single bytes from MSP430 Master
//
//  Description: This demo connects two MSP430's via the I2C bus. The master
//  transmits to the slave. This is the slave code. The interrupt driven
//  data receiption is demonstrated using the USCI_B0 RX interrupt.
//  ACLK = n/a, MCLK = SMCLK = default DCO = ~1.045MHz
//
//                                /|\  /|\
//                MSP430FR5739    10k  10k     MSP430FR5739
//                   slave         |    |         master
//             -----------------   |    |   -----------------
//           -|XIN  P1.6/UCB0SDA|<-|----+->|P1.6/UCB0SDA  XIN|-
//            |                 |  |       |                 |
//           -|XOUT             |  |       |             XOUT|-
//            |     P1.7/UCB0SCL|<-+------>|P1.7/UCB0SCL     |
//            |                 |          |                 |
//            |                 |          |                 |
//
//   P. Thanigai
//   Texas Instruments Inc.
//   August 2010
//   Built with CCS V4 and IAR Embedded Workbench Version: 5.10
//******************************************************************************

#include "msp430fr5739.h"



unsigned char A0RXData,A2RXData;
unsigned char A0[256],A2[256];
int i;




void main(void)

{
   
    WDTCTL = WDTPW + WDTHOLD;

    // Init SMCLK = MCLk = ACLK = 1MHz
    CSCTL0_H = 0xA5;
    CSCTL1 |= DCOFSEL0 + DCOFSEL1;          // Set max. DCO setting = 8MHz
    CSCTL2 = SELA_3 + SELS_3 + SELM_3;      // set ACLK = MCLK = DCO
    CSCTL3 = DIVA_3 + DIVS_3 + DIVM_3;      // set all dividers to 1MHz

    // Configure Pins for I2C
    P1SEL1 |= BIT6 + BIT7;                  // Pin init
    // eUSCI configuration
    UCB0CTLW0 |= UCSWRST ;                //Software reset enabled
    UCB0CTLW0 |= UCMODE_3  + UCSYNC;        //I2C mode, sync mode
    UCB0I2COA0 = 0x48 + UCOAEN;
    UCB0I2COA1 = 0x47 + UCOAEN;    //SLAVE0 own address is 0x0A+ enable
                                 //own address is 0x48 + enable   
    UCB0CTLW0 &=~UCSWRST;                //clear reset register
    UCB0IE |=  UCRXIE0 + UCRXIE1;                 //receive interrupt enable   
    P1REN  |=0x02;                           // PIN1.0实现上拉电阻
     
    __bis_SR_register(CPUOFF + GIE);        // Enter LPM0 w/ interrupts
    __no_operation();     
}




#pragma vector = USCI_B0_VECTOR
__interrupt void USCIB0_ISR(void)

{

   switch(__even_in_range(UCB0IV,0x1E))
    {
      case 0x00: break;                     // Vector 0: No interrupts break;
      case 0x02: break;                     // Vector 2: ALIFG break;
      case 0x04: break;                     // Vector 4: NACKIFG break;
      case 0x06: break;                     // Vector 6: STTIFG break;
      case 0x08: break;                     // Vector 8: STPIFG break;
      case 0x0a: break;                     // Vector 10: RXIFG3 break;
      case 0x0c: break;                     // Vector 14: TXIFG3 break;
      case 0x0e: break;                     // Vector 16: RXIFG2 break;
      case 0x10: break;                     // Vector 18: TXIFG2 break;
      case 0x12:
        A2RXData = UCB0RXBUF;
        for(i=0;i<256;i++)
        {
          A2[i+256] = A2RXData;
        }
 break;                     // Vector 20: RXIFG1 break;
      case 0x14: break;                     // Vector 22: TXIFG1 break;
      case 0x16:
     
        A0RXData = UCB0RXBUF;
        for(i=0;i<256;i++)
        {
          A0 = A0RXData;
        }
        
               break;                 // Get RX data
       
    // Vector 24: RXIFG0 break;
      case 0x18: break;                     // Vector 26: TXIFG0 break;
      case 0x1a: break;                     // Vector 28: BCNTIFG break;
      case 0x1c: break;                     // Vector 30: clock low timeout break;
      case 0x1e: break;                     // Vector 32: 9th bit break;
      default: break;   
    }
   
}