// Loop until 32kHz crystal stabilizes
do
{
IFG1 &= ~OFIFG; // Clear oscillator fault flag
for (i = 50000; i; i--); // Delay
}
while (IFG1 & OFIFG); // Test osc fault flag
FLL_CTL1 = SELS; // Select SMCLK source as XT2CLK
P1DIR = 0x32; // Set P1.1,4,5 as outputs
P1SEL = 0x32; // Select P1.1,4,5 as clocks