//********************************************************
// MSP-FET430P140 Demo - Timer_A Toggle P1.0, CCR0 Contmode ISR, DCO SMCLK
//
// Description; Toggle P1.0 using using software and TA_0 ISR. Toggle rate is
// set at 50000 DCO/SMCLK cycles. Default DCO frequency used for TACLK.
// Durring the TA_0 ISR P0.1 is toggled and 50000 clock cycles are added to
// CCR0. TA_0 ISR is triggered exactly 50000 cycles. CPU is normally off and
// used only durring TA_ISR.
// ACLK = n/a, MCLK = SMCLK = TACLK = DCO~ 800k
//
//
// MSP430F149
// ---------------
// /|\| XIN|-
// | | |
// --|RST XOUT|-
// | |
// | P1.0|-->LED
//
// M. Buccini
// Texas Instruments, Inc
// October 2003
// Built with IAR Embedded Workbench Version: 2.20A
//************************************************************