/* USART1 configured as follow: - BaudRate = 115200 baud - Word Length = 8 Bits - One Stop Bit - No parity - Hardware flow control disabled (RTS and CTS signals) - Receive and transmit enabled - USART Clock disabled - USART CPOL: Clock is active low - USART CPHA: Data is captured on the middle - USART LastBit: The clock pulse of the last data bit is not output to the SCLK pin */ USART_InitStructure.USART_BaudRate = 9600; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No ; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_InitStructure.USART_Clock = USART_Clock_Disable; USART_InitStructure.USART_CPOL = USART_CPOL_Low; USART_InitStructure.USART_CPHA = USART_CPHA_2Edge; USART_InitStructure.USART_LastBit = USART_LastBit_Disable; USART_Init(USART1, &USART_InitStructure);
/* If a Overrun error is signaled by the card */ if(USART_GetITStatus(USART1, USART_IT_ORE) != RESET) { USART_ReceiveData(USART1); } /* If a Noise error is signaled by the card */ if(USART_GetITStatus(USART1, USART_IT_NE) != RESET) { USART_ReceiveData(USART1); }