RXNEIE: RXNE Interrupt Enable. This bit is set and cleared by software. 0: Interrupt is inhibited 1: An USART interrupt is generated whenever ORE=1 or RXNE=1 in the USART_SR register
/******************** (C) COPYRIGHT 2007 STMicroelectronics ******************** * File Name : main.c * Author : MCD Application Team * Date First Issued : 02/05/2007 * Description : Main program body ******************************************************************************** * History: * 05/21/2007: V0.3 * 04/02/2007: V0.2 * 02/05/2007: V0.1 ******************************************************************************** * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. *******************************************************************************/
/* Includes ------------------------------------------------------------------*/ #include "stm32f10x_lib.h"
/* Enable the USART Receive interrupt: this interrupt is generated when the USART1 receive data register is not empty */ USART_ITConfig(USART2, USART_IT_RXNE , ENABLE); USART_Cmd(USART2, ENABLE);//串口2使能 }
/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/