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平台:2410+dm9000
现在dm9000已经可以读到,但是现在数据写不进去
写入读出的数据不一致
#define IOREAD(o) ((UCHAR)*((volatile UCHAR *)(o)))
#define IOWRITE(o, d) *((volatile UCHAR *)(o)) = (UCHAR)(d)
#define IOREAD16(o) ((USHORT)*((volatile USHORT *)(o)))
#define IOWRITE16(o, d) *((volatile USHORT *)(o)) = (USHORT)(d)
#define IOREAD32(o) ((ULONG)*((volatile ULONG *)(o)))
#define IOWRITE32(o, d) *((volatile ULONG *)(o)) = (ULONG)(d)
#define MEMREAD(o) ((USHORT)*((volatile USHORT *)(dwEthernetMemBase + (o))))
#define MEMWRITE(o, d) *((volatile USHORT *)(dwEthernetMemBase + (o))) = (USHORT)(d)
static DWORD dwEthernetIOBase;
static DWORD dwEthernetDataPort;
static UCHAR DM9000_iomode;
static USHORT hash_table[4];
static DWORD dwEthernetMemBase;
//V1.02
static UCHAR DM9000_rev;
#define DM9000_DWORD_MODE 1
#define DM9000_BYTE_MODE 2
#define DM9000_WORD_MODE 0
//#define DM9000_MEM_MODE
#ifdef DM9000_MEM_MODE
#define READ_REG1 ReadReg
#define READ_REG2 MEMREAD
#define WRITE_REG1 WriteReg
#define WRITE_REG2 MEMWRITE
#else
#define READ_REG1 ReadReg
#define READ_REG2 ReadReg
#define WRITE_REG1 WriteReg
#define WRITE_REG2 WriteReg
#endif
static BOOL bIsPacket;
static UCHAR
ReadReg(USHORT offset)
{
IOWRITE(dwEthernetIOBase, offset);
return IOREAD(dwEthernetDataPort);
}
static void
WriteReg(USHORT offset, UCHAR data)
{
IOWRITE(dwEthernetIOBase, offset);
IOWRITE(dwEthernetDataPort, data);
}
写函数为:
tmplen = (length+1)/2;
for (i = 0; i < tmplen; i++)
IOWRITE16(dwEthernetDataPort, ((USHORT *)pbData));
break;
其中dwEthernetDataPort=iobase+4(cmd接在addr2上)
iobase=片选地址+300
函数写完后我再进行读操作,数据不一致,是什么的问题?
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