各位兄弟,我的DM9000现在没什么反应,帮忙看看,谢拉!
所有的信息罗列如下,权当作一个总结,方便以后的朋友参考。
平台:三星C100,DM9000AEP,中断信号接EINT0引脚。
问题:没有中断报上来,插上网线后,两个指示灯看起来貌似正常。
我手上有一份友坚6410的BSP,包含DM9000的驱动,工作正常。
按照友坚的驱动,我在C100的BSP中做了如下工作:
1. Config.bib中,添加如下配置信息:
ETHNET 98000000 00100000 RESERVED ; 1MB used for DM9000
2. Platform.bib中,添加如下信息:
dm9isa.dll $(_FLATRELEASEDIR)\dm9isa.dll NK SHMK
3. Platform.reg中,添加如下内容:
;--------------DM9000A driver-------------------------------------------------
[HKEY_LOCAL_MACHINE\Comm\DM9CE]
"DisplayName"="DM9000A ISA Fast Ethernet Adapter"
"Group"="NDIS"
"ImagePath"="dm9isa.dll"
[HKEY_LOCAL_MACHINE\Comm\DM9CE\Linkage]
"Route"=multi_sz:"DM9CE1"
[HKEY_LOCAL_MACHINE\Comm\DM9CE1]
"DisplayName"="DM9000A ISA Fast Ethernet Adapter"
"Group"="NDIS"
"ImagePath"="dm9isa.dll"
[HKEY_LOCAL_MACHINE\Comm\Tcpip\Linkage]
"Bind"="DM9CE1"
[HKEY_LOCAL_MACHINE\Comm\DM9CE1\Parms]
"BusNumber"=dword:0
"BusType"=dword:1
"XmitBuffer"=dword:20
"RecvBuffer"=dword:20
"IrqNumber"=dword:0
"SysIntr"=dword:12 ; 0x12, SYSINT_FIRMWARE+2=18
"IoAddress"=dword:88000000
"NetworkAddress"="e0aac8de6352"
[HKEY_LOCAL_MACHINE\Comm\DM9CE1\Parms\TcpIp]
"EnableDHCP"=dword:1
"UseZeroBroadcast"=dword:0
; "IpAddress"="159.99.249.238"
; "Subnetmask"="255.255.255.0"
; "DefaultGateway"="159.99.249.1"
; "DNS"="10.192.2.45"
; "WINS"="0.0.0.0"
;------------------------------------------------------------------------------
4. dm9isa.cpp中,更改CONFIG_PARAMETER:
CONFIG_PARAMETER g_szDm9ConfigParams[] =
{
{ CID_CONNECTION_TYPE, -1, NDIS_STRING_CONST("ConnectionType") },
{ CID_SLOT_NUMBER, -1, NDIS_STRING_CONST("SlotNumber")},
{ CID_BUFFER_PHYSICAL_ADDRESS, 0, NDIS_STRING_CONST("BufferPhysicalAddress")},
{ CID_TXBUFFER_NUMBER, 0x20, NDIS_STRING_CONST("XmitBuffer")},
{ CID_RXBUFFER_NUMBER, 0x10, NDIS_STRING_CONST("RecvBuffer")},
{ CID_ADAPTER_NUMBER, 0, NDIS_STRING_CONST("AdapterNumber")},
{ CID_IO_BASE_ADDRESS, 0x88000000, NDIS_STRING_CONST("IoAddress")},
{ CID_IO_RANGE, 0x10, NDIS_STRING_CONST("IoRange")},
{ CID_IRQ_NUMBER, 0, NDIS_STRING_CONST("IrqNumber")},
{ -1,-1,NULL}
};
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5. bsp_config.h中,添加系统中断号:
#define SYSINTR_ETH (SYSINTR_FIRMWARE+2) // for DM9000, value is 16+2=18, 0x12
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6. oemaddrtap_cfg.inc中,添加如下内容:
DCD 0x98000000, 0x88000000, 32 ; 32 MB SROM(SRAM/ROM) BANK 1
7. 在init.c中,添加如下内容:
#define DM9000A_Tacs (0x0) // 0clk
#define DM9000A_Tcos (0x0) // 0clk
#define DM9000A_Tacc (0x7) // 14clk
#define DM9000A_Tcoh (0x0) // 0clk
#define DM9000A_Tah (0x0) // 0clk
#define DM9000A_Tacp (0x0) // 0clk
#define DM9000A_PMC (0x0) // normal(1data)
static void InitializeGPIO(void)
{
volatile S5PC100_SROMCON_REG *pSROMREG = (S5PC100_SROMCON_REG *)OALPAtoVA(S5PC100_BASE_REG_PA_SMC, FALSE);
pSROMREG->SROM_BW = (pSROMREG->SROM_BW & ~(0xF<<4)) |
(1<<7)| // nWBE/nBE(for UB/LB) control for Memory Bank1(0=Not using UB/LB, 1=Using UB/LB)
(1<<6)| // Wait enable control for Memory Bank1 (0=WAIT disable, 1=WAIT enable)
(1<<5)| // Select SMC Address base(0=half word(16bits), 1=byte(8bits))
(1<<4); // Data bus width control for Memory Bank1 (0=8-bit, 1=16-bit)
pSROMREG->SROM_BC1 = ((DM9000A_Tacs<<28)+(DM9000A_Tcos<<24)+(DM9000A_Tacc<<16)+(DM9000A_Tcoh<<12)+(DM9000A_Tah<<8)+(DM9000A_Tacp<<4)+(DM9000A_PMC));
}
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8. 在intr.c中,添加如下内容:
extern BOOL OALIntrEnableIrqs(UINT32 count, const UINT32 *pIrqs);
volatile static S5PC100_GPIO_REG * pGPIOReg = NULL;
//------------------------------------------------------------------------------
//
// Function: BSPIntrInit
//
BOOL BSPIntrInit()
{
UINT32 value = 0;
pGPIOReg = (S5PC100_GPIO_REG *)OALPAtoVA(S5PC100_BASE_REG_PA_GPIO, FALSE);
// EINT0(GPH0:0)->IRQ_LAN
pGPIOReg->GPH0CON = (pGPIOReg->GPH0CON & ~(0x3<<0)) | (0x2<<0); // IRQ_LAN by EINT0 (GPH0:0)
pGPIOReg->GPH0PUD = (pGPIOReg->GPH0PUD & ~(0x3<<0)) | (0x0<<0); // pull-up/down disabled
pGPIOReg->GPIO_INT_CON.GPIO_INT0_CON = (pGPIOReg->GPIO_INT_CON.GPIO_INT0_CON & ~(0x7<<0)) | (0x0<<0); // Low level triggered
OALIntrStaticTranslate(SYSINTR_OHCI, IRQ_UHOST); // for USB Host 1.1
OALIntrStaticTranslate(SYSINTR_ETH, IRQ_EINT0);
value = IRQ_EINT0;
OALIntrEnableIrqs(1, &value);
return TRUE;
}
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9. 在intr.c中,OALIntrEnableIrqs函数中添加如下内容:
//------------------------------------------------------------------------------
//
// Function: OALIntrEnableIrqs
//
BOOL OALIntrEnableIrqs(UINT32 count, const UINT32 *pIrqs)
{
BOOL bRet = TRUE;
UINT32 VirtualIRQ;
UINT32 PhysicalIRQ;
UINT32 i;
OALMSG(OAL_INTR&&OAL_FUNC, (L"+OALIntrEnableIrqs(%d, 0x%08x)\r\n", count, pIrqs));
for (i = 0; i < count; i++)
{
#ifndef OAL_BSP_CALLBACKS
VirtualIRQ = pIrqs[i];
#else
// Give BSP chance to enable irq on subordinate interrupt controller
VirtualIRQ = BSPIntrEnableIrq(pIrqs[i]);
#endif
if (VirtualIRQ == OAL_INTR_IRQ_UNDEFINED) continue;
// Translate to Physical IRQ
PhysicalIRQ = g_VirIrq2PhyIrq[VirtualIRQ];
/////////////////// Added by Brian Liu ////////////////////////////////////
if(PhysicalIRQ == PHYIRQ_EINT0)
{
g_pGPIOReg->GPIO_INT_MASK.GPIO_INT0_MASK &= ~(1<
}
//////////////////////////////////////////////////////////////////////////
if (PhysicalIRQ < VIC1_BIT_OFFSET)
{
g_pVIC0Reg->VICINTENABLE = (0x1<
}
// add for c100.. by shin..
else if (PhysicalIRQ < VIC2_BIT_OFFSET)
{
g_pVIC1Reg->VICINTENABLE = (0x1<<(PhysicalIRQ-VIC1_BIT_OFFSET));
}
else if (PhysicalIRQ < PHYIRQ_MAX_S5PC100)
{
g_pVIC2Reg->VICINTENABLE = (0x1<<(PhysicalIRQ-VIC2_BIT_OFFSET));
}
else
{
bRet = FALSE;
}
}
OALMSG(OAL_INTR&&OAL_FUNC, (L"-OALIntrEnableIrqs(rc = %d)\r\n", bRet));
return bRet;
}
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