if (FSTAT&0x10){ //Check to see if FACCERR is set
FSTAT = FSTAT | 0x10; //write a 1 to FACCERR to clear
}
paddr=(unsigned char *)faddr;
*paddr=0xff;
FCMD="0x40";
FSTAT = FSTAT | 0x80; //Put FCBEF at 1.
_asm NOP; //Wait 4 cycles
_asm NOP;
_asm NOP;
_asm NOP;
if (FSTAT&0x30){ //check to see if FACCERR or FVIOL are set
return 0xFF; //if so, error.
}
while ((FSTAT&0x40)==0){ } //else wait for command to complete
if (FSTAT&0x10){ //Check to see if FACCERR is set
FSTAT = FSTAT | 0x10; //write a 1 to FACCERR to clear
}
paddr=(unsigned char *)faddr;
*paddr=pdata;
FCMD="0x20";
FSTAT = FSTAT | 0x80; //Put FCBEF at 1.
_asm NOP; //Wait 4 cycles
_asm NOP;
_asm NOP;
_asm NOP;
if (FSTAT&0x30){ //check to see if FACCERR or FVIOL are set
return 0xFF; //if so, error.
}
while ((FSTAT&0x40)==0){ } //else wait for command to comple
return 0x00;
}