This register is used to store responses from SD cards.
Register Address R/W Description Reset Value
RSPREG0_0 0X4AC00010 ROC Response Register 0 (Channel 0) 0x0
RSPREG1_0 0X4AC00014 ROC Response Register 1 (Channel 0) 0x0
RSPREG2_0 0X4AC00018 ROC Response Register 2 (Channel 0) 0x0
RSPREG3_0 0X4AC0001C ROC Response Register 3 (Channel 0) 0x0
Register Address R/W Description Reset Value
RSPREG0_1 0X4A800010 ROC Response Register 0 (Channel 1) 0x0
RSPREG1_1 0X4A800014 ROC Response Register 1 (Channel 1) 0x0
RSPREG2_1 0X4A800018 ROC Response Register 2 (Channel 1) 0x0
RSPREG3_1 0X4A80001C ROC Response Register 3 (Channel 1) 0x0
Name Bit Description Initial Value
CMDRSP [127:0] Command Response
The Table below describes the mapping of command responses from
the SD Bus to this register for each response type. In the table, R[]
refers to a bit range within the response data as transmitted on the SD
Bus, REP[] refers to a bit range within the Response register.
128-bit Response bit order : {RSPREG3, RSPREG2, RSPREG1,
RSPREG0}
Table 20-3. Response Bit Definition for Each Response Type.
Kind of Response Meaning of Response Response Field Response Register
R1, R1b (normal response) Card Status R [39:8] REP [31:0]
R1b (Auto CMD12 response) Card Status for Auto CMD12 R [39:8] REP [127:96]
R2 (CID, CSD register) CID or CSD reg. incl. R [127:8] REP [119:0]
R3 (OCR register) OCR register for memory R [39:8] REP [31:0]
R4 (OCR register) OCR register for I/O etc R [39:8] REP [31:0]
R5,R5b SDIO response R [39:8] REP [31:0]
R6 (Published RCA response) New published RCA[31:16] etc R [39:8] REP [31:0]
R7 ? R [39:8] REP [31:0]