Common Control 3
Bit[7]: Reserved
Bit[6]: Output data MSB and LSB swap
Bit[5:4]: Reserved
Bit[3]: Pin selection
0C COM3 00 RW 1: Change RESET pin to EXPST_B (frame exposure
mode timing) and change PWDN pin to FREX (frame
exposure enable)
Bit[2]: VarioPixel for VGA, CIF, QVGA, QCIF, QQVGA, and
QQCIF
Bit[1]: Reserved
Bit[0]: Single frame output (used for Frame Exposure mode only)
Common Control 4
Bit[7]: VarioPixel for QVGA, QCIF, QQVGA, and QQCIF
Bit[6:3]: Reserved
Bit[2]: Tri-state option for output clock at power-down period
0: Tri-state at this period
0D COM4 00 RW
1: No tri-state at this period
Bit[1]: Tri-state option for output data at power-down period
0: Tri-state at this period
1: No tri-state at this period
Bit[0]: Reserved