Synopsys China Job Posting: Hot job Please send your CV to jobs-china@synopsys.com to fulfill your career.
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Support Center 应用engineer(后端) Beijing/ Shanghai :BS in EE with 3+ years or Master in EE with relevant experiences. Hands-on experiences in back-end tools and flow of IC back-end design; basic skills of logic design, synthesis & optimization and static timing analysis using commercial EDA tools. It is essential that the individual possess excellent customer interface and communication skills.
售前技术Backend engineer Shanghai :MSEE, or equivalent required with 3+ years of experience, or BSEE or equivalent with 5+ years of experience. Experiences should include ASIC/SoC back-end design (Place & Route). Experience in timing sign-off and physical verification is desired. Excellent verbal and written presentation/communication skills are mandatory. Customer sensitivity, the ability to multiplex many issues & set priorities and have a helpful/caring attitude towards customers, and the desire to help customers exploit new technologies are essential for success in the position.
芯片设计前端engineer Shanghai :Must have BS degree with 5+ years of hands-on IC design experience, MS with 3+ years of applicable IC design experience, or related Ph.D. with 1+ year of applicable IC design experience, particularly involving top level and block RTL creation, RTL quality assessment, library quality assessment, logical/physical synthesis, timing closure, STA, equivalence check, and function verification. Knowledge and experience of chip's front-end implementation work is required. Knowledge of Synopsys tools is an advantage. Experience with design planning and/or back-end implementation would also be an advantage. It is essential that the individual demonstrates strong communication, project management and customer relationship skills. Good English, both written and spoken, is required. He/She should have ability to work proactively at customer site, with remote support from Synopsys other team members. He/She should be able to travel occasionally for short periods of time, and occasionally work on-site at customer premises as required.
技术应用eng(北京)(PCIe Controller/SATA )/IP : a minimum of 5 years of related experience. Overall understanding of the ASIC design process is required.Strong communication skills and ability to interact with customers as well as peers is required.Must be proficient with Unix, Verilog HDL, tcl/Perl is plus.Knowledge of competitive EDA tool products and product knowledge in the areas of Synthesis, Simulation, STA, Verification, Testability, Place and Route, Design Reuse and/or Physical Design is highly desired.Domain knowledge of the PCI Express/SATA Protocol with relevant experience (specifications, compliance and interoperability requirements, design/verification experience etc.) will be a definite plus.Debug and troubleshooting skills are highly desirable.Occasional travel will be required
FCAE/(DDR,USB/PCIe/357BR) Shenzhen :Qualified applicants will have a BSEE, MSEE preferred, + 3 years relevant experience in ASIC/FPGA designs. Exposure to IP-based SOC design and real tape-out experience are highly desired. An understanding of system design and logic design using an HDL language, synthesis, and simulation and verification CAD tools is important. Hands on experience with DC or equivalent are important. The ability to conduct technical meetings, presentations, seminars, product demonstrations, and training to customers and to the sales team is required. Experience with I/O protocols (such as USB, PCI/PCIe, SATA, DDRn, HDMI, and Ethernet) is important. Good written and verbal communication skills and problem solving skills are required. Travel (up to 30%) within the AP region may be required
[ 本帖最后由 JobsChinasnps 于 2010-7-24 08:57 编辑 ]
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