U-boot_1.1.6在天嵌2440上的移植
陈新立 chenxinli009@163.com
我买的天嵌的板子,厂商只给了u-boot的bin文件,没有给出移植的过程,自己间间断断摸索了大半年,终于有了一小步了,现在uboot从norflash启动后,打印一串数据。自己写出来整理一下。
参考资料:嵌入式Linux应用开发完全手册 韦东山
https://bbs.eeworld.com.cn/thread-80832-6-1.html 顶嵌嵌入式培训的资料
http://deshunfan.blog.163.com/blog/static/34244101200972471221611/
1. board目录下smdk2410复制为tq2440
cp -r smdk2410 tq2440
2. include/configs目录下建立配置文件tq2440.h。可将include/configs/smdk2410.h复制为
tq2440.h
3. 顶层Makefile在以下位置增加下列两行
smdk2410_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 NULL s3c24x0
tq2440_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t tq2440 NULL s3c24x0
4、在board/tq2440 Makefile增加如下修改
COBJS := tq2440.o
SOBJS := lowlevel_init.o
删除了flash.o
5、 修改SDRAM的配置(可暂时不要)
u-boot-1.1.6\board\tq2440\ lowlevel_init.S文件中修改一下数据
define B1_BWSCON (DW32) 修改为 #define B1_BWSCON (DW16)
#define B5_BWSCON (DW16) 修改为 #define B5_BWSCON (DW8)
#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
修改为
#define REFCNT 0x4f4/*period=7.8125us,HCLK=100Mhz, (2048+1-7.8125*100) */
6、 修改board/tq2440/tq2440.c中的board_init函数
/* S3c2440:MPLL = (2*m*Fin)/(p*2^s),UPLL = (2*m*Fin)/(p*2^s)
*m = M(the value for divider M)+8, p=P(the value for divider P)+2*/
#define S3C2440_MPLL_400MHZ (0x5c<<12) | (0x01<<4) | (0x01))
#define S3C2440_UPLL_48MHZ (0x38<<12) | (0x02<<4) | (0x02))
#define S3C2440_CLKDIV 0x05 /* FCLK:HCLK:PCLK=1:4:8,UCLK=UPLL*/
int board_init (void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
clk_power->CLKDIVN = S3C2440_CLKDIV;
/* change to asynchronous bus mod */
__asm__( "mrc p15, 0, r1, c1, c0, 0\n" /* read ctrl register */
"orr r1, r1, #0xc0000000\n" /* Asynchronous */
"mcr p15, 0, r1, c1, c0, 0\n" /* write ctrl register */
:::"r1"
);
/* to reduce PLL lock time, adjust the LOCKTIME register */
clk_power->LOCKTIME = 0xFFFFFF;
/* configure MPLL */
clk_power->MPLLCON = S3C2440_MPLL_400MHZ;
/* some delay between MPLL and UPLL */
delay (4000);
/* configure UPLL */
clk_power->UPLLCON = S3C2440_UPLL_48MHZ;
/* some delay between MPLL and UPLL */
delay (8000);
/* set up the I/O ports */
gpio->GPACON = 0x007FFFFF;
gpio->GPBCON = 0x00044555;
gpio->GPBUP = 0x000007FF;
gpio->GPCCON = 0xAAAAAAAA;
gpio->GPCUP = 0x0000FFFF;
gpio->GPDCON = 0xAAAAAAAA;
gpio->GPDUP = 0x0000FFFF;
gpio->GPECON = 0xAAAAAAAA;
gpio->GPEUP = 0x0000FFFF;
gpio->GPFCON = 0x000055AA;
gpio->GPFUP = 0x000000FF;
gpio->GPGCON = 0xFF95FFBA;
gpio->GPGUP = 0x0000FFFF;
gpio->GPHCON = 0x002AFAAA;
gpio->GPHUP = 0x000007FF;
/* arch number of SMDK2410-Board */
gd->bd->bi_arch_number = MACH_TYPE_S3C2440;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x30000100;
icache_enable();
dcache_enable();
return 0;
}
7、 头文件修改 include/configs添加tq2440.h
cp include/configs/smdk2410.h include/configs/tq2440.h
#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
#if 0
#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
#endif
修改为:
#if 0
#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
#endif
#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
添加以下宏定义
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1
#define CFG_MONITOR_BASE 0x00000000
8、 include/s3c24x0.h
在下面结构体中添加
typedef struct {
S3C24X0_REG32 LOCKTIME;
S3C24X0_REG32 MPLLCON;
S3C24X0_REG32 UPLLCON;
S3C24X0_REG32 CLKCON;
S3C24X0_REG32 CLKSLOW;
S3C24X0_REG32 CLKDIVN;
S3C24X0_REG32 CAMDIVN;
}
添加NAND寄存器结构体(可暂时不要)
/* NAND FLASH (see S3C2440 manual chapter 6, www.top-e.org) */
typedef struct {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCONT;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFMECCD0;
S3C24X0_REG32 NFMECCD1;
S3C24X0_REG32 NFSECCD;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFESTAT0;
S3C24X0_REG32 NFESTAT1;
S3C24X0_REG32 NFMECC0;
S3C24X0_REG32 NFMECC1;
S3C24X0_REG32 NFSECC;
S3C24X0_REG32 NFSBLK;
S3C24X0_REG32 NFEBLK;
} /*__attribute__((__packed__))*/ S3C2440_NAND;
9、修改cpu/arm920t/s3c24x0/speed.c
在#define MPLL 0
#define UPLL 1上面增加DECLARE_GLOBAL_DATA_PTR;
增加宏定义
/* for s3c2440 */
#define S3C2440_CLKDIVN_PDIVN (1<<0)
#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1)
#define S3C2440_CLKDIVN_HDIVN_1 (0<<1)
#define S3C2440_CLKDIVN_HDIVN_2 (1<<1)
#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1)
#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1)
#define S3C2440_CLKDIVN_UCLK (1<<3)
#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0)
#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4)
#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8)
#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9)
#define S3C2440_CAMDIVN_DVSEN (1<<12)
static ulong get_PLLCLK(int pllreg)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
ulong r, m, p, s;
if (pllreg == MPLL)
r = clk_power->MPLLCON;
else if (pllreg == UPLL)
r = clk_power->UPLLCON;
else
hang();
m = ((r & 0xFF000) >> 12) + 8;
p = ((r & 0x003F0) >> 4) + 2;
s = r & 0x3;
/* support both of S3C2410 and S3C2440 */
/*return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s));*/
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
else
return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s)); /* S3C2440 */
}
/* return FCLK frequency */
/* return HCLK frequency */
ulong get_HCLK(void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
unsigned long clkdiv;
unsigned long camdiv;
int hdiv = 1;
/* support both of S3C2410 and S3C2440 */
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
else
{
clkdiv = clk_power->CLKDIVN;
camdiv = clk_power->CAMDIVN;
/* work out clock scalings */
switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
case S3C2440_CLKDIVN_HDIVN_1:
hdiv = 1;
break;
case S3C2440_CLKDIVN_HDIVN_2:
hdiv = 2;
break;
case S3C2440_CLKDIVN_HDIVN_4_8:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
break;
case S3C2440_CLKDIVN_HDIVN_3_6:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
break;
}
return get_FCLK() / hdiv;
}
/*return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());*/
}
/* return PCLK frequency */
ulong get_PCLK(void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
/*return((clk_power->CLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());*/
unsigned long clkdiv;
unsigned long camdiv;
int hdiv = 1;
/* support both of S3C2410 and S3C2440 */
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
return((clk_power->CLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
else
{
clkdiv = clk_power->CLKDIVN;
camdiv = clk_power->CAMDIVN;
/* work out clock scalings */
switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
case S3C2440_CLKDIVN_HDIVN_1:
hdiv = 1;
break;
case S3C2440_CLKDIVN_HDIVN_2:
hdiv = 2;
break;
case S3C2440_CLKDIVN_HDIVN_4_8:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
break;
case S3C2440_CLKDIVN_HDIVN_3_6:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
break;
}
return get_FCLK() / hdiv / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
}
}
Make clean
Make tq2440_config
Make all
随后,Jtag下载到开发板,这个教程上有,打开电源选择norflash启动,串口打印出:
U-Boot 1.1.6 (Jun 30 2010 - 18:12:17)
DRAM: 64 MB
Flash: 0 kB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
SMDK2410 # fl
Bank # 1: CFI conformant FLASH (0 x 0) Size: 0 MB in 35 Sectors
Erase timeout 16843009 ms, write timeout 1 ms, buffer write timeout 1 ms, buffer size 1
Sector Start Addresses:
00000000 (RO) 00004000 (RO) 00006000 (RO) 00008000 (RO) 00010000 (RO)
00020000 00030000 (RO) 00040000 00050000 00060000
00070000 (RO) 00080000 00090000 000A0000 000B0000 (RO)
000C0000 000D0000 000E0000 000F0000 (RO) 01010101
00110001 00120000 00130000 (RO) 00140000 00010000 (RO)
01010101 (RO) 00000001 (RO) 00000001 (RO) 00190000 (RO) 001A0000
00006C66 001C0000 001D0000 (RO) 001E0000 001F0000
SMDK2410 # md 0
00000000: 00000000 00000000 00000000 00000000 ................
00000010: 00000000 00000000 00000000 00000000 ................
00000020: 00520051 00020059 00400000 00000000 Q.R.Y.....@.....
00000030: 00000000 00270000 00000036 00040000 ......'.6.......
00000040: 000a0000 00050000 00040000 00150000 ................
00000050: 00000002 00000000 00000004 00400000 ..............@.
00000060: 00010000 00200000 00000000 00800000 ...... .........
00000070: 001e0000 00000000 00000001 00000000 ................
00000080: 00520050 00310049 00000030 00010002 P.R.I.1.0.......
00000090: 00040001 00000000 00000000 00000000 ................
000000a0: 00000000 00000000 00000000 00000000 ................
000000b0: 00000000 00000000 00000000 00000000 ................
000000c0: 00000000 00000000 00000000 00000000 ................
000000d0: 00000000 00000000 00000000 00000000 ................
000000e0: 00000000 00000000 00000000 00000000 ................
000000f0: 00000000 00000000 00000000 00000000 ................
SMDK2410 # <INTERRUPT>