Edge Detection Reference Design

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Edge Detection Reference Design [复制链接]

Introduction
Video and image processing typically require very high computational power. Given the increasing processing demands, the parallel processing capabilities of Altera® programmable logic devices (PLDs) make them an attractive implementation option for highly repetitive tasks found in video and imaging functions. Instead of using multiple programmable digital signal processors, a single FPGA with an embedded Nios® II processor can deliver the requisite level of computing power more cost-effectively, while simplifying board complexity.