if ((SR1Register &0x0084) == 0x0080)
{
/* If there is still data to write */
if (NumbOfBytes1!=0)
{
/* Write the data in DR register */
I2C1->DR = Buffer_Tx1[Tx_Idx1++];
/* Decrment the number of data to be written */
NumbOfBytes1--;
/* If no data remains to write, disable the BUF IT in order
to not have again a TxE interrupt. */
if (NumbOfBytes1 == 0)
{
/* Disable the BUF IT */
I2C1->CR2 &= (uint16_t)~I2C_IT_BUF;
}
}
SR1Register = 0;
SR2Register = 0;
}
/* If BTF and TXE are set (EV8_2), program the STOP */
if ((SR1Register &0x0084) == 0x0084)
{
/* Program the STOP */
I2C1->CR1 |= CR1_STOP_Set;
/* Disable EVT IT In order to not have again a BTF IT */
I2C1->CR2 &= (uint16_t)~I2C_IT_EVT;
SR1Register = 0;
SR2Register = 0;
}
case I2C_EVENT_MASTER_BYTE_TRANSMITTING: /* EV8 */
//TRA, BUSY, MSL, TXE 0x70080
if (Direction == Receiver)
{
DeviceOffset = 0xffffffff; // enter read-phase 2 (the same as no memory space)
I2C_ITConfig(I2C1, I2C_IT_BUF , DISABLE);
while ((I2C1->CR1 & 0x200) == 0x200);
I2C_GenerateSTART(I2C1, ENABLE);
break;
}
if (TxLength >0)
{
I2C_SendData(I2C1, *pTxBuffer1++);
TxLength--;
}
/* Disable the I2C_IT_BUF interrupt after sending the last buffer data
(last EV8) to no allow a new interrupt with TxE and only BTF could generate it */
else if(TxLength == 0)
{
I2C_ITConfig(I2C1, I2C_IT_BUF, DISABLE);
I2C_GenerateSTOP(I2C1, ENABLE); }
break;
case I2C_EVENT_SLAVE_BYTE_TRANSMITTED: /* EV3 */
//TRA, BUSY, TXE and BTF 0x60084
if (TxLength>0)
{
I2C_SendData(I2C1, *pTxBuffer1++);
TxLength--;
}
break;
case 0x60080:
// TRA, BUSY,TXE, no BTF
// if this case added, above case would never be reached
if (TxLength>0)
{
I2C_SendData(I2C1, *pTxBuffer1++);
TxLength--;
if (TxLength ==0)
{
SlaveTransitionComplete =1;
i2c_comm_state = COMM_DONE;
I2C_ITConfig(I2C1, I2C_IT_BUF , DISABLE);//close TxE int
I2C_ITConfig(I2C1, I2C_IT_ERR , ENABLE);//to handle AF from master receiver
PV_flag_1 = 0;
}
}
I2C_ITConfig(I2C1, I2C_IT_BUF , ENABLE); // also allow RxNE
break;
case I2C_EVENT_SLAVE_BYTE_RECEIVED: /* EV2 */
// BUSY RxNE 0x20040
*pRxBuffer1++ = I2C_ReceiveData(I2C1);
RxLength--; // controled by i2c1 sender
if (RxLength == 0)
{
SlaveReceptionComplete = 1;
I2C_ITConfig(I2C1, I2C_IT_BUF , DISABLE); // only EVT(STOPF) int
I2C_ITConfig(I2C1, I2C_IT_EVT , ENABLE);
}
break;
case I2C_EVENT_SLAVE_STOP_DETECTED: /* EV4 */
// STOPF 0x10
/* Clear I2C2 STOPF flag: read of I2C_SR1 followed by a write in I2C_CR1 */
(void)(I2C_GetITStatus(I2C1, I2C_IT_STOPF));
I2C_Cmd(I2C1, ENABLE);
i2c_comm_state = COMM_DONE;
PV_flag_1 = 0;
//I2C_ITConfig(I2C2, I2C_IT_EVT, DISABLE);
break;
case 0x20050:
// used when Rx and Tx handley by one mcu at the same time
// receive last data and clear stopf
*pRxBuffer1++ = I2C_ReceiveData(I2C1);
RxLength--;
SlaveReceptionComplete = 1;
case 0x20010:
// busy+stopf
// when last data read isr exist, there would be stopf flag
//which is set during read ISR. and as sender's check begin
// busy also set
i2c_comm_state = CHECK_IN_PROCESS;
(void)(I2C_GetITStatus(I2C1, I2C_IT_STOPF));
I2C_Cmd(I2C1, ENABLE);
break;