DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
- Working with an Architecture/Algorithm Development Team to finalize system architecture
for optimal implementation of digital signal processing algorithms, including architectural
definition and tradeoffs, die size estimation.
- Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification,
formal verification and static timing analysis.
- Perform some transistor level high speed digital integrated circuit design various cells and
blocks within custom chips for the hard disk drive industry. Examples of cells and blocks
include multiplexors, adders, multipliers, dividers, specific functional macro blocks,
- Work very closely with physical design engineers from floorplan through final parasitic
extraction to ensure smallest area and highest performance possible.
PREFERRED EXPERIENCE:
- Communicate effectively within a global business environment (must be proficient in both
spoken and written English)
- Experience in logic design, synthesis, static timing analysis, and verification
- Experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, and
formal verification
- Experience in developing simulation and verification test benches
- Knowledge of Verilog/VHDL design languages
- Excellent technical troubleshooting and demonstrated problem solving skills
- Must be willing to follow a structured design approach including design for reuse and
provide thorough design documentation