micropython1.22.2无法编译开发板，1.20.0没问题。请教一下是啥原因？
本帖最后由 scdyzjcq 于 2024-3-17 14:58 编辑<p>本人新手，手上有一个Black F407VE开发板，想学习一下micropython，按照网上的办法在WINDOWS系统里安装的虚拟机，虚拟机安装了Ubuntu64系统。按照帖子先后在micropython-1.17和micropython-1.20.0两个版本里几经折腾，能够顺利编译成功固件，下载到开发板里正常运行。今天看到micropython版本到了1.22.2了，就下载下来重新编译一下，到了最后一步。make BOARD=VCC_GND_F407VE，就如图所示就进行步下去了。我又到micropython-1.20.0里面去试了，结果编译正常。请教一下micropython-1.22.2改动了啥，要怎么操作才能编译？</p>
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<p>新版本谨慎使用，看看官方说明变更是什么</p>
<p>根据把错的文件，应该是时钟频率不支持，1.20的没找到（我这github经常连不上），可以看一下和这个有什么区别</p>
<p>原文部分</p>
<pre>
<code class="language-python">"""
This program computes I2S PLL parameters for STM32
processors supporting an I2S PLL in the clock tree.
Those processors are listed below in the mcu_support_plli2s[] list.
"""
import re
from collections import namedtuple
class MCU:
def __init__(self, range_plli2sn, range_plli2sr):
self.range_plli2sn = range_plli2sn
self.range_plli2sr = range_plli2sr
mcu_default = MCU(range_plli2sn=range(50, 432 + 1), range_plli2sr=range(2, 7 + 1))
mcu_table = {"stm32f401xe": MCU(range_plli2sn=range(192, 432 + 1), range_plli2sr=range(2, 7 + 1))}
# list of stm32 processors that support an I2S PLL in the clock tree
mcu_support_plli2s = [
"stm32f405xx",
"stm32f401xe",
"stm32f407xx",
"stm32f411xe",
"stm32f412zx",
"stm32f413xx",
"stm32f427xx",
"stm32f429xx",
"stm32f439xx",
"stm32f446xx",
"stm32f722xx",
"stm32f733xx",
"stm32f746xx",
"stm32f756xx",
"stm32f767xx",
"stm32f769xx",
]
# The following function calculates the multiplier (plli2sn) and divider (plli2sr) parameters
# for the I2S PLL that leads to the best possible accuracy for the I2S sampling clock.
# This is done by creating a set of candidate parameters (plli2sn, plli2sr)
# and then determining which candidate parameters lead to a sampling clock frequency (Fs)
# that most closely matches the desired sampling clock frequency (I2S rate).
#
# A description of the clock tree helps to understand this function:
# The clock tree on a STM32 device is complex.A subset of the clock tree is used for I2S, as follows:
# 1. HSE clock is divided by the PLLM divider and feeds the I2S PLL (called PLLI2S in the STM32 clock tree).
# 2. The output frequency of the I2S PLL is controlled by two parameters, plli2sn and plli2sr.
# 3. The clock output of the I2S PLL is called PLLI2SCLK
# 4. PLLI2SCLK is gated into the I2S peripheral, where the name changes to I2SxCLK
# 5. I2SxCLK is an input to the I2S clock generator.
# 6. The output frequency of the I2S clock generator is controlled by
# two configuration parameters, I2SDIV and ODD.
# 7. The output of the I2S clock generator is the audio sampling frequency (Fs),
# which is used to create the signal at the I2S WS output pin.
#
# Example references:
# RM0090 Reference manual STM32F405/415, STM32F407/417, STM32F427/437 and STM32F429/439
# - section 6.3.23 RCC PLLI2S configuration register (RCC_PLLI2SCFGR)
# - section 28.4.4 Clock generator
# RM0385 Reference manual STM32F75xxx and STM32F74xxx
# - section 5.3.23 RCC PLLI2S configuration register (RCC_PLLI2SCFGR)
# - section 32.7.5 Clock generator
#
# The calculations below mimic the fixed-point integer calculations in the STM32 I2S driver,
# in the function HAL_I2S_Init().
def compute_plli2s_table(hse, pllm):
plli2s = namedtuple("plli2s", "bits rate plli2sn plli2sr i2sdiv odd error")
plli2s_table = []
for bits in (16, 32):
for rate in (8_000, 11_025, 12_000, 16_000, 22_050, 24_000, 32_000, 44_100, 48_000):
plli2s_candidates = []
for plli2sn in mcu.range_plli2sn:
for plli2sr in mcu.range_plli2sr:
I2SxCLK = hse // pllm * plli2sn // plli2sr
if I2SxCLK < 192_000_000:
# compute I2S clock generator parameters: i2sdiv, odd
tmp = (((I2SxCLK // (bits * 2)) * 10) // rate) + 5
tmp = tmp // 10
odd = tmp & 1
i2sdiv = (tmp - odd) // 2
Fs = I2SxCLK / ((bits * 2) * ((2 * i2sdiv) + odd))
error = (abs(Fs - rate) / rate) * 100
plli2s_candidates.append(
plli2s(
bits=bits,
rate=rate,
plli2sn=plli2sn,
plli2sr=plli2sr,
i2sdiv=i2sdiv,
odd=odd,
error=error,
)
)
# sort based on error
plli2s_candidates_sorted = sorted(plli2s_candidates, key=lambda x: x.error)
# select the best candidate
plli2s_table.append(plli2s_candidates_sorted)
return plli2s_table</code></pre>
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本帖最后由 scdyzjcq 于 2024-3-25 20:20 编辑
<p>可是我试直接在micropyth-1.22.2 /ports/stm32/编译的它里面的板子，没做任何改动，试了好几个都是这样。根据错误提示对比了1.20和1.22的micropyth-1.22.2 /ports/stm32/boards</p>
<div>/的文件，1.20版本里面没有plli2svalues.py这个文件，只有pllvalues.py。1.22.2比1.20版本多了一个编译出问题的plli2svalues.py文件，删除它还不行。<br />
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scdyzjcq 发表于 2024-3-25 20:19
可是我试直接在micropyth-1.22.2 /ports/stm32/编译的它里面的板子，没做任何改动，试了好几个都是这样。根 ...
<p _msthash="581" _msttexthash="21656154">最后那个是1.20的</p>
<p>把板子的定义文件传上来看看</p>
<div class='shownolgin' data-isdigest='no'><p>我尝试编译是正常的，请检查以下几个方面：</p>
<ul>
<li>检查arm gcc编译器版本（<strong>arm-none-eabi-gcc -v</strong>），尽量用新版本，不要用ubuntu自带的，自带的编译器版本太低了。 目前最新版本是 v13.2下载地址是：https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads</li>
<li>编译前用 clean 指令清除以前的编译的临时文件，如 make -C ports/stm32/ BOARD=VCC_GND_F407VE clean；避免编译时旧的临时文件没有被更新造成问题。</li>
</ul>
<p> </p>
<p>另外，注意一般不要用root用户编译，这样系统容易出问题。</p>
<p> </p>
<p>还有可以在编译指令最后加上 -jn 开关，并行编译以加快编译速度。n可以根据你的CPU的线程数设定，几核几线程，就设置多少，比如4核8线程，，就设为 -j8。</p>
</div><script>showreplylogin();</script><script type="text/javascript">(function(d,c){var a=d.createElement("script"),m=d.getElementsByTagName("script"),eewurl="//counter.eeworld.com.cn/pv/count/";a.src=eewurl+c;m.parentNode.insertBefore(a,m)})(document,523)</script> <div class='shownolgin' data-isdigest='no'><p>安装版主的回复重新下载安装新版本的arm-none-eabi-gcc ，我原来是在官网下载的micropython1.22.2。今天安装论坛里的教程重新进行了一遍，结果还是那样，在原来下载的1.20.0和1.21.0两个版本都可以正常编译，固件下载到单片机都可以正常运行，源码里的VCC_GND_F407VE开发板外部晶振频率是25M，，没在出错文频率范围内，我改成8M还是不行，默认的PYBOARD的晶振频率本来就是8M，直接编译它还是一样的提示。</p>
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</div><script>showreplylogin();</script> <div class='shownolgin' data-isdigest='no'>scdyzjcq 发表于 2024-3-30 16:25
安装版主的回复重新下载安装新版本的arm-none-eabi-gcc ，我原来是在官网下载的micropython1.22.2。今天安 ...
<p>我这里编译上正常的，把完整log贴出来看看</p>
</div><script>showreplylogin();</script> <div class='shownolgin' data-isdigest='no'>dcexpert 发表于 2024-3-30 18:41
我这里编译上正常的，把完整log贴出来看看
<p _msthash="779" _msttexthash="66106365"><font _msthash="785" _mstmutation="1" _msttexthash="32003569">能详细说说该贴</font><font _msthash="840" _mstmutation="1" _msttexthash="4059198">哪个</font><font _msthash="869" _mstmutation="1" _msttexthash="4467437">文件</font><font _msthash="891" _mstmutation="1" _msttexthash="17986956">吗？不是很</font><font _msthash="921" _mstmutation="1" _msttexthash="12416404">懂。谢谢</font><font _msthash="939" _mstmutation="1" _msttexthash="8618506">了！</font></p>
</div><script>showreplylogin();</script> <div class='shownolgin' data-isdigest='no'>scdyzjcq 发表于 2024-3-31 11:35
能详细说说该贴哪个文件吗？不是很懂。谢谢了！
<p>就是编译时显示的那些信息，复制过来就行</p>
</div><script>showreplylogin();</script> <div class='shownolgin' data-isdigest='no'><p>chenq@chenq-virtual-machine:~/micropython/ports/stm32$ make BOARD=my_board<br />
Use make V=1 or set BUILD_VERBOSE in your environment to increase build verbosity.<br />
mkdir -p build-my_board/genhdr<br />
GEN build-my_board/genhdr/pins.h<br />
GEN build-my_board/genhdr/plli2stable.h<br />
File "boards/plli2svalues.py", line 74<br />
for rate in (8_000, 11_025, 12_000, 16_000, 22_050, 24_000, 32_000, 44_100, 48_000):<br />
^<br />
SyntaxError: invalid syntax<br />
Makefile:627: recipe for target 'build-my_board/genhdr/plli2stable.h' failed<br />
make: *** Error 1<br />
make: *** Deleting file 'build-my_board/genhdr/plli2stable.h'<br />
chenq@chenq-virtual-machine:~/micropython/ports/stm32$</p>
<p> </p>
</div><script>showreplylogin();</script> <div class='shownolgin' data-isdigest='no'><p _msthash="974" _msttexthash="719472143">问题已经解决了，我原来虚拟机安装的是Ubuntu16.10版本，后来重新建立了虚拟机，安装了Ubuntu18.04版本，就可以正常编译了。</p>
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