AG32VF407 AGRV2K Verilog编写控制双路gpio输出不同频率方波

LitchiCheng 发表于 2023-8-13 18:19

<div class='showpostmsg'><article data-content="[{"type":"block","id":"3060-1621846615933","name":"paragraph","data":{},"nodes":[{"type":"text","id":"p5PQ-1621846617594","leaves":[{"text":"根据原理图，选择两个pin脚作为输出","marks":[]}]}],"state":{}},{"type":"block","id":"V8qd-1691920946399","name":"image","data":{"version":1,"url":"https://note.youdao.com/yws/res/4/WEBRESOURCEa2810b703e310939f63d4bf31334bde4","width":410,"height":325},"nodes":[],"state":{"loading":false,"renderSource":"https://note.youdao.com/yws/res/4/WEBRESOURCEa2810b703e310939f63d4bf31334bde4","initialSize":{"width":410,"height":325}}},{"type":"block","id":"coNk-1691920946405","name":"paragraph","data":{},"nodes":[{"type":"text","id":"7e3v-1691920946404","leaves":[{"text":"修改VE文件，clk选择PIN_OSC，使用内部晶振8Mhz，gpio使用PIN_51和52，pinout是数组","marks":[]}]}],"state":{}},{"type":"block","id":"JmRS-1691920931919","name":"image","data":{"version":1,"url":"https://note.youdao.com/yws/res/b/WEBRESOURCE031c581f0ac2bd3f4d1d2e59bc1e7aab","width":634,"height":386},"nodes":[],"state":{"loading":false,"renderSource":"https://note.youdao.com/yws/res/b/WEBRESOURCE031c581f0ac2bd3f4d1d2e59bc1e7aab","initialSize":{"width":634,"height":386}}},{"type":"block","id":"4hXf-1691920931935","name":"paragraph","data":{},"nodes":[{"type":"text","id":"BjFo-1691920931933","leaves":[{"text":"添加pll，修改pll，输入频率8M","marks":[]}]}],"state":{}},{"type":"block","id":"VMpT-1691920995293","name":"image","data":{"version":1,"url":"https://note.youdao.com/yws/res/c/WEBRESOURCE2420617429d3ba9adcae54df9b3281cc","width":986,"height":881},"nodes":[],"state":{"loading":false,"renderSource":"https://note.youdao.com/yws/res/c/WEBRESOURCE2420617429d3ba9adcae54df9b3281cc","initialSize":{"width":986,"height":881}}},{"type":"block","id":"AUxD-1691921008092","name":"paragraph","data":{},"nodes":[{"type":"text","id":"WvHw-1691921008093","leaves":[{"text":"输出c0，32Mhz","marks":[]}]}],"state":{}},{"type":"block","id":"tIn5-1691921262876","name":"image","data":{"version":1,"url":"https://note.youdao.com/yws/res/a/WEBRESOURCE71954a0d213a318b2ece65ea637124fa","width":880,"height":400},"nodes":[],"state":{"loading":false,"renderSource":"https://note.youdao.com/yws/res/a/WEBRESOURCE71954a0d213a318b2ece65ea637124fa","initialSize":{"width":880,"height":400}}},{"type":"block","id":"PUK4-1691921262880","name":"paragraph","data":{},"nodes":[{"type":"text","id":"hnJ5-1691921262878","leaves":[{"text":"输出c1，8Mhz","marks":[]}]}],"state":{}},{"type":"block","id":"yxTz-1691921270611","name":"image","data":{"version":1,"url":"https://note.youdao.com/yws/res/3/WEBRESOURCEfa703e188e515b97339c219bc47b6e53","width":875,"height":428},"nodes":[],"state":{"loading":false,"renderSource":"https://note.youdao.com/yws/res/3/WEBRESOURCEfa703e188e515b97339c219bc47b6e53","initialSize":{"width":875,"height":428}}},{"type":"block","id":"Bcve-1691921270615","name":"paragraph","data":{},"nodes":[{"type":"text","id":"iKPk-1691921270613","leaves":[{"text":"增加verilog逻辑代码，两个always循环，按照c0和c1翻转pin_51和pin_52","marks":[]}]}],"state":{}},{"type":"block","id":"IbBT-1691921008091","name":"code","data":{"language":"","theme":"default","wrap":false},"nodes":[{"type":"block","id":"CYlC-1691921008090","name":"code-line","data":{},"nodes":[{"type":"text","id":"ZV9L-1691921008088","leaves":[{"text":"`timescale 1ns / 1ns\r\r","marks":[]}]}]},{"type":"block","id":"j3vk-1691921008416","name":"code-line","data":{},"nodes":[{"type":"text","id":"7jsE-1691921008415","leaves":[{"text":"module test(clk,pinout);\r\r","marks":[]}]}]},{"type":"block","id":"HSLv-1691921008420","name":"code-line","data":{},"nodes":[{"type":"text","id":"TFvk-1691921008419","leaves":[{"text":"input\tclk;\r","marks":[]}]}]},{"type":"block","id":"XUBL-1691921008426","name":"code-line","data":{},"nodes":[{"type":"text","id":"lLDo-1691921008425","leaves":[{"text":"output pinout;\r","marks":[]}]}]},{"type":"block","id":"TPhD-1691921008428","name":"code-line","data":{},"nodes":[{"type":"text","id":"Y6Cj-1691921008427","leaves":[{"text":"reg pinout;\r","marks":[]}]}]},{"type":"block","id":"tvTf-1691921035033","name":"code-line","data":{},"nodes":[{"type":"text","id":"6IHI-1691921035032","leaves":[{"text":"\r","marks":[]}]}]},{"type":"block","id":"F40v-1691921008434","name":"code-line","data":{},"nodes":[{"type":"text","id":"3Qut-1691921008433","leaves":[{"text":"pll\tpll1_inst (\r","marks":[]}]}]},{"type":"block","id":"FmQJ-1691921008436","name":"code-line","data":{},"nodes":[{"type":"text","id":"PV3B-1691921008435","leaves":[{"text":"\t.areset ( 1'b0 ),\r","marks":[]}]}]},{"type":"block","id":"d5OD-1691921008438","name":"code-line","data":{},"nodes":[{"type":"text","id":"mL6k-1691921008437","leaves":[{"text":"\t.inclk0 ( clk ),\r","marks":[]}]}]},{"type":"block","id":"8fu9-1691921008440","name":"code-line","data":{},"nodes":[{"type":"text","id":"kIym-1691921008439","leaves":[{"text":"\t.c0 ( c0 ),\r","marks":[]}]}]},{"type":"block","id":"v5vO-1691921008442","name":"code-line","data":{},"nodes":[{"type":"text","id":"EsFj-1691921008441","leaves":[{"text":"\t.c1 ( c1 )\r","marks":[]}]}]},{"type":"block","id":"JcgO-1691921008444","name":"code-line","data":{},"nodes":[{"type":"text","id":"HGyS-1691921008443","leaves":[{"text":"\t);\r","marks":[]}]}]},{"type":"block","id":"5Bqx-1691921008446","name":"code-line","data":{},"nodes":[{"type":"text","id":"vTMg-1691921008445","leaves":[{"text":"\r","marks":[]}]}]},{"type":"block","id":"WLlI-1691921008448","name":"code-line","data":{},"nodes":[{"type":"text","id":"D08k-1691921008447","leaves":[{"text":"wire c0;\r","marks":[]}]}]},{"type":"block","id":"a7eT-1691921008450","name":"code-line","data":{},"nodes":[{"type":"text","id":"AK3h-1691921008449","leaves":[{"text":"wire c1;\r","marks":[]}]}]},{"type":"block","id":"a7sk-1691921038336","name":"code-line","data":{},"nodes":[{"type":"text","id":"F5Fa-1691921038334","leaves":[{"text":"\r","marks":[]}]}]},{"type":"block","id":"0JQd-1691921008454","name":"code-line","data":{},"nodes":[{"type":"text","id":"rKz4-1691921008453","leaves":[{"text":"initial begin\r","marks":[]}]}]},{"type":"block","id":"xzCp-1691921008458","name":"code-line","data":{},"nodes":[{"type":"text","id":"ktze-1691921008457","leaves":[{"text":"pinout = 3'b111;\r","marks":[]}]}]},{"type":"block","id":"KtSi-1691921008460","name":"code-line","data":{},"nodes":[{"type":"text","id":"JU23-1691921008459","leaves":[{"text":"end\r","marks":[]}]}]},{"type":"block","id":"z6cT-1691921008462","name":"code-line","data":{},"nodes":[{"type":"text","id":"xLO6-1691921008461","leaves":[{"text":"\r","marks":[]}]}]},{"type":"block","id":"0DFX-1691921008464","name":"code-line","data":{},"nodes":[{"type":"text","id":"sXMV-1691921008463","leaves":[{"text":"always@(posedge c0) begin\r","marks":[]}]}]},{"type":"block","id":"SZBI-1691921008466","name":"code-line","data":{},"nodes":[{"type":"text","id":"ucs2-1691921008465","leaves":[{"text":"\tpinout = ~pinout;\r","marks":[]}]}]},{"type":"block","id":"6Cbi-1691921008468","name":"code-line","data":{},"nodes":[{"type":"text","id":"gm1K-1691921008467","leaves":[{"text":"end\r","marks":[]}]}]},{"type":"block","id":"06Y4-1691921008470","name":"code-line","data":{},"nodes":[{"type":"text","id":"djX3-1691921008469","leaves":[{"text":"\r","marks":[]}]}]},{"type":"block","id":"ceMD-1691921008472","name":"code-line","data":{},"nodes":[{"type":"text","id":"w25v-1691921008471","leaves":[{"text":"always@(posedge c1) begin\r","marks":[]}]}]},{"type":"block","id":"mC8j-1691921008474","name":"code-line","data":{},"nodes":[{"type":"text","id":"3eRe-1691921008473","leaves":[{"text":"\tpinout = ~pinout;\r","marks":[]}]}]},{"type":"block","id":"vfam-1691921008476","name":"code-line","data":{},"nodes":[{"type":"text","id":"xoof-1691921008475","leaves":[{"text":"end\r\t\t\r","marks":[]}]}]},{"type":"block","id":"phx3-1691921008481","name":"code-line","data":{},"nodes":[{"type":"text","id":"WnO7-1691921008480","leaves":[{"text":"endmodule","marks":[]}]}]}],"state":{"language":"sql"}},{"type":"block","id":"UNXD-1691921008094","name":"paragraph","data":{},"nodes":[{"type":"text","id":"SXe6-1691921008095","leaves":[{"text":"烧录，选择full chip erase before program","marks":[]}]}],"state":{}},{"type":"block","id":"d92B-1691921087593","name":"image","data":{"version":1,"url":"https://note.youdao.com/yws/res/b/WEBRESOURCE6d2581552cd546ddb1efb3d161d7da4b","width":731,"height":638},"nodes":[],"state":{"loading":false,"renderSource":"https://note.youdao.com/yws/res/b/WEBRESOURCE6d2581552cd546ddb1efb3d161d7da4b","initialSize":{"width":731,"height":638}}},{"type":"block","id":"Jeld-1691921087598","name":"paragraph","data":{},"nodes":[{"type":"text","id":"E17r-1691921087596","leaves":[{"text":"实测波形，这里12Mx2=24M，还有3.2Mx2=6.4M，和实际设置有差异，不确定是内部晶振问题还是配置问题，还需要和AGM进行技术咨询，总体的逻辑是符合预期，调整clock out的比例，波形输出也成比例。","marks":[]}]}],"state":{}},{"type":"block","id":"g1h5-1691921103749","name":"image","data":{"version":1,"url":"https://note.youdao.com/yws/res/d/WEBRESOURCE1be1a3a3aad4f55bcd8ac54eef892d6d","width":2560,"height":1390},"nodes":[],"state":{"loading":false,"renderSource":"https://note.youdao.com/yws/res/d/WEBRESOURCE1be1a3a3aad4f55bcd8ac54eef892d6d","initialSize":{"width":2560,"height":1390}}},{"type":"block","id":"7bbi-1691921103753","name":"paragraph","data":{},"nodes":[{"type":"text","id":"aGkt-1691921103752","leaves":[{"text":"","marks":[]}]}],"state":{}}]">
<p>根据原理图，选择两个pin脚作为输出</p>

<p>  </p>

<p>修改VE文件，clk选择PIN_OSC，使用内部晶振8Mhz，gpio使用PIN_51和52，pinout是数组</p>

<p>  </p>

<p>添加pll，修改pll，输入频率8M</p>

<p>  </p>

<p>输出c0，32Mhz</p>

<p>  </p>

<p>输出c1，8Mhz</p>

<p>  </p>

<p>增加verilog逻辑代码，两个always循环，按照c0和c1翻转pin_51和pin_52</p>

<pre>
<code>`timescale 1ns / 1ns

module test(clk,pinout);

input clk;
output pinout;
reg pinout;

pll pll1_inst (
.areset ( 1'b0 ),
.inclk0 ( clk ),
.c0 ( c0 ),
.c1 ( c1 )
);

wire c0;
wire c1;

initial begin
pinout = 3'b111;
end

always@(posedge c0) begin
pinout = ~pinout;
end

always@(posedge c1) begin
pinout = ~pinout;
end

endmodule</code></pre>

<p>烧录，选择full chip erase before program</p>

<p>  </p>

<p>实测波形，这里12Mx2=24M，还有3.2Mx2=6.4M，和实际设置有差异，不确定是内部晶振问题还是配置问题，还需要和AGM进行技术咨询，总体的逻辑是符合预期，调整clock out的比例，波形输出也成比例。</p>

<p>  </p>

<p>视频</p>

<p><iframe allowfullscreen="true" frameborder="0" height="450" src="//player.bilibili.com/player.html?bvid=1Ru4y1X7Vf&page=1" style="background:#eee;margin-bottom:10px;" width="700"></iframe><br />
 </p>
</article>
</div><script> var loginstr = '<div class="locked">查看本帖全部内容，请<a href="javascript:;" style="color:#e60000" class="loginf">登录</a>或者<a href="https://bbs.eeworld.com.cn/member.php?mod=register_eeworld.php&action=wechat" style="color:#e60000" target="_blank">注册</a></div>';

if(parseInt(discuz_uid)==0){
(function($){
var postHeight = getTextHeight(400);
$(".showpostmsg").html($(".showpostmsg").html());
$(".showpostmsg").after(loginstr);
$(".showpostmsg").css({height:postHeight,overflow:"hidden"});
})(jQuery);
} </script><script type="text/javascript">(function(d,c){var a=d.createElement("script"),m=d.getElementsByTagName("script"),eewurl="//counter.eeworld.com.cn/pv/count/";a.src=eewurl+c;m.parentNode.insertBefore(a,m)})(document,523)</script>

lkh747566933 发表于 2023-8-13 19:01

外面还要加个电压跟随器吧，要不然用的时候会出问题。

火辣西米秀 发表于 2023-8-13 21:49

<p>从实测波形3.2Mx2=6.4M和实际设置有差异，有多少</p>

LitchiCheng 发表于 2023-8-14 20:50

lkh747566933 发表于 2023-8-13 19:01
外面还要加个电压跟随器吧，要不然用的时候会出问题。

<p>嗯，只是测试一下逻辑，时钟还有些问题，官方还没给解决</p>

LitchiCheng 发表于 2023-8-14 20:50

火辣西米秀发表于 2023-8-13 21:49
从实测波形3.2Mx2=6.4M和实际设置有差异，有多少

<p>配置的8Mhz</p>

页: [1]

电子工程世界-论坛's Archiver

AG32VF407 AGRV2K Verilog编写控制双路gpio输出不同频率方波