打破传统 发表于 2022-1-13 17:45

国产FPGA高云GW1N-4系列开发板测评之——IP和原语的使用及功耗分析工具使用

<p style="text-indent:31.0pt; text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">这一篇我们来学习高云的IP或原语的使用及功耗分析</span></span></span></span></span></span></span></span></p>

<p style="text-indent:31.0pt; text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">使用高云自带的IP有两种方式,一种是通过工具IP Core Generator加载,然后例化的方式,另外一种是直接调用原语的方式。</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph">&nbsp;<span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">使用IP生成工具的方式:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">我们还是以之前的counter工程为例,打开工程后菜单栏单击IP Core Generator,在Filter中可以搜索IP,双击打开IP就可以配置。右边信息框中可以查看IP的说明及说明文档,根据所选器件,不可用的IP以浅灰色示之。</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">打开CLKDIV IP,可以看到option页面上可配置参数为分频系数和校验使能/去使能</span></span></span></span></span></span></span></span><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">单击ok后选择加载IP到当前工程,软件会自动打开一个例化参考文件_tmp.v并将ip加载到当前工程中如下图:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">在工程文件中只需要coppy然后修改一下端口即可:</span></span></span></span></span></span></span></span></p>

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<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">原语的方式:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">采用原语的方式就简单了直接例化原语即可,只是这种方式需要设置参数,所以显得比较臃肿,实际上采用ip core generator的方式就是在原语的基础上封装了一层,可以让代码简洁化一些。</span></span></span></span></span></span></span></span></p>

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<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">高云FPGA小蜜蜂系列号称低成本低功耗,接下来我们来看看功耗分析工具的使用,一般FPGA项目中功耗估计也是一块重要的地方:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph">&nbsp;&nbsp;&nbsp; <span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">首先工程综合完成后添加.gpa文件:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">双击.gpa文件打开GPA配置窗口:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">共有3页设置,第一页是工作条件设置General Setting,包括器件、环境、 电压,根据实际应用条件修改参数即可。</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">第二页是信号翻转率设置Rate Setting,可以直接对IO,或Net设置翻转率,也可以导入波形文件VCD文件,还可以采用默认翻转率:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">第三页配置时钟的工作使能特性Clock Setting ,包括时钟设置、B-SRAM设置、IO设置、DFF设置:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">保存后编译即可生成功耗估计分析报告:</span></span></span></span></span></span></span></span></p>

<p style="text-align:justify"><span style="font-size:10.5pt"><span style="font-family:等线"><span style="text-justify:inter-ideograph"><span style="font-size:14.0pt"><span style="background:white"><span style="font-family:宋体"><span style="color:#444444"><span style="letter-spacing:.75pt">通过以上设置可以大致估计出工程建立后FPGA功耗,有助于整体功耗的估计,从上图可以看出逻辑少的时候功耗是非常小的,以上只是功耗估计工具的使用流程,具体工程中应该按照可能存在的最差条件进行估计以便得到最大功耗参考。</span></span></span></span></span></span></span></span></p>

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Jacktang 发表于 2022-1-14 07:29

<p>这个方法是通过工具IP Core Generator加载例化的方式么</p>

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打破传统 发表于 2022-1-14 09:20

<p>可以通过&nbsp;<span style="color:#333333">IP Core Generator,也可以直接使用原语例化</span></p>
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