【玩转C2000 Launchpad】数字功放
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用C2000 Launchpad做个音频功放,不知道可行否。近几天间断地搞了一下,开始时用实验板焊,太麻烦,后来又找块PCB焊上部分相关元件。
一、电路组成。
音频输入:由ADCIN6输入,将直流电平固定在1.65V。
处理方法:ADC转换后的值,直接控制PWM输出,这里使用了PWM1A及PWM1B。
驱动及输出:使用MOSFET驱动器,驱动N-P互补型MOS管。
具体电路如下:
二、程序部分。
使用PWM1A及PWM1B驱动,其波形要求如下:
PWM初始化部分:
void InitEPwm1(void) { EPwm1Regs.TBPRD = 120; // Set timer period EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0 EPwm1Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // loaded from its shadow register EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; // Load registers every ZERO EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Set actions EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // Set PWM1A on Zero EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm1Regs.DBCTL.bit.IN_MODE = 0; EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; // enable Dead-band module EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active Hi complementary EPwm1Regs.DBFED = 7; // FED = 50 TBCLKs initially EPwm1Regs.DBRED = 5; // RED = 70 TBCLKs initially
// Setup compare EPwm1Regs.CMPA.half.CMPA = 60;
//EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Set PWM1A on Zero //EPwm1Regs.AQCTLB.bit.PRD = AQ_SET;
// 触发ADC SOC EPwm1Regs.ETSEL.bit.SOCAEN = 1; EPwm1Regs.ETSEL.bit.SOCASEL= ET_CTR_PRD;
EPwm1Regs.ETPS.bit.SOCACNT = ET_1ST; EPwm1Regs.ETPS.bit.SOCAPRD = ET_1ST; /* EALLOW; // Note these registers are protected // and act only on ChA EPwm1Regs.HRCNFG.all = 0x0; // clear all bits first EPwm1Regs.HRCNFG.bit.EDGMODE = HR_FEP; // Control Falling Edge Position EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP; // CMPAHR controls the MEP EPwm1Regs.HRCNFG.bit.HRLOAD = HR_CTR_ZERO; // Shadow load on CTR=Zero EDIS; MEP_ScaleFactor = 111*256; */ }
ADC初始化部分:
void InitAdc(void) { EALLOW; SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1; (*Device_cal)(); EDIS;
// Please note that for the delay function below to operate correctly the // CPU_RATE define statement in the DSP2802x_Examples.h file must // contain the correct CPU clock period in nanoseconds. EALLOW; AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; // Power ADC BG AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; // Power reference AdcRegs.ADCCTL1.bit.ADCPWDN = 1; // Power ADC AdcRegs.ADCCTL1.bit.ADCENABLE = 1; // Enable ADC AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; // Select interal BG EDIS; DELAY_US(ADC_usDELAY); // Delay before converting ADC channels
//////////////////////////////////////////////////////// EALLOW; AdcRegs.ADCCTL2.all = 0; // ADC clock = CPU clock AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; //ADCINT1 trips after AdcResults latch
AdcRegs.INTSEL1N2.bit.INT1E = 1; // AdcRegs.INTSEL1N2.bit.INT1SEL = 0; // EOC0 is trigger for ADCINT1 AdcRegs.INTSEL1N2.bit.INT1CONT = 1; // Enable ADCINT1 Continuous mode
AdcRegs.ADCINTSOCSEL1.bit.SOC0 = 0; // TRIGSEL field determines SOCx trigger.
AdcRegs.SOCPRICTL.all = 0; // SOC0 is first SOC
AdcRegs.ADCSOCFRC1.all = 0;
// trigger source ///////////////////////////////////////////discarding AdcRegs.ADCSOC0CTL.bit.ACQPS = 6; // Sample window is 7 cycles AdcRegs.ADCSOC0CTL.bit.CHSEL = 0x0e; // ADCINB6 AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 5; // ePWM1A, ADCSOCA
EDIS;
DELAY_US(ADC_usDELAY); }
中断处理部分:
interrupt void AdcInt1Isr(void) { ledflash++; if (ledflash > 57000) { GpioDataRegs.GPATOGGLE.bit.GPIO2 = 1; ledflash = 0; } EPwm1Regs.CMPA.half.CMPA = AdcResult.ADCRESULT0>>5; PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; }
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